Topic: [ActiveMining] The Official Active Mining Discussion Thread [Self-Moderated] - page 439. (Read 771566 times)

Only 45,000 shares to take it to 0.001 btc per share on Bitfunder.

Goes to show that on good news the price will recover rapidly.

Not entirely sure this is accruate

Structured Design:
ActiveMining

Standard-Cell Design
KnC

Full-Custom
Bitfury
HashFast
Cointerra

BFL Falls in either Standard-Cell or Full-Custom

Im assuming they will still be behind hashfast too, despite their delay. Even if not, the bulk of the orders has probably already happened anyway, especially at the high initial premium prices, and ActM would have been perceived as being third.

If you keep your investors successful and happy, then you will be successful and happy!  When the tough gets going, start spewing off more old cheesy phrases like you're making 80's commercials. 
And remember, patience is a virtue!  So please guys, keep investing, and keep on truckin'.  Activemining - it's so active, you're going to lose your socks!

..MENTOS...

seriously what's your problem? if you want a chat with him call his number or send him a pm. I'm guessing you can use a phone but if not ask your mum to show you.

Sorry for my lack of research, but who is #2? (assuming KnC is #1)

So bALLBREAKER has to wait for his machines.  Oh well, you win some you lose some.

seriously, has anyone heard from Ken the last few days?

Yes turnaround is a lot faster, but honestly, if the other vendors are bottlenecked because they didnt get enough wafers, they are beyond stupid for not having ordered a ton more. They cost next to nothing compared to their resale value, better to order too many than too few. You can always sell the chips separately if needed, and its not likely you wouldnt be able to sell them above manufacturing cost.

My point however, is that despite the shorter development cycle of a structured asic, ActM is probably going to be only third on the 28nm market, and quite far behind in preorders. This approach would have absolutely perfect to beat all the others to market, and being first, the negatives of worse power consumption and higher unit cost would have been mostly irrelevant.

https://hashfast.com/?p=2445&preview=true

Bad news for the competition, good news for ActM. Looking forward to seeing updates from Ken soon!

Oh, goodness!  Where did that bid wall go?  Down to .0005 already?  And what's below?  NOTHING?  Seems like a god time to double down

when the tough get going... the tough, uh... get going.

...heard that somewhere.

Yeah because what this thread really needs is another pseudo-genius FUDing troll... ignored.

Time to Market isn't lost quite yet, I believe the real value comes in when they want more Wafers made after they have a working miner. eASIC has "Fab Time" allocated to them and again because their wafers are prepped somewhat this time should be significantly less than other companies for additional wafers.

This is the advantage of eASIC, if this doesn't exist/isn't realistic then I agree that it would be unwise to use eASIC

Full custom or standard cell asic wont change a thing about the maskset price. The "first batch wafer cost", we can safely ignore in this context, at $4000 per wafer, thats noise. As for the design, well, for a bitcoin asic that shouldnt cost more than $100k either. So Id say we are in agreement on the cost of the mask set.


Yes, but you said NRE of this was higher and then mentioned it cost $1M. The reality is the opposite, if your $1M is correct (and it certainly sounds plausible to me), its a considerably lower NRE than a traditional asic.


Again, I agree and always did say its a sensible approach, although the advantage of fast time to market is basically lost by now, and I worry about the power consumption handicap. Time will tell.

And if it went off line confidence would take a knock. Do you think with how secretive Ken has been that he would openly test a prototype? Wouldn't happen.

If we had a prototype it would be hashing on our account where the current avalons are hashing, as this would inspire shareholder confidence.

Unfortunately we are still 2 weeks away from the first prototype.

Oh you meant good stuff, er nope, I can't think of any. Sorry. And yes I am Ken. Yep, its me, Ken. Da man himself. Now get off my thread you tart.

I'M Spartacus!

I think you are overpricing 28nm maskset, Physical Design + Full MaskSet + First Batch Wafers would cost $3-$5M total on a Full Custom 28nm

Like I said, this isn't full custom. This is an FPGA Port and is much easier to do the Physical Design, many less Layers, and the Wafers cost a little more because they are all primed and ready with the basic layers needed to speed up fabrication. (You are effectively paying a premium for speed)

Many people don't use a FPGA Copy because it is power inefficient and you could get much more out of a Full-Custom. Read as Wasted Silicon.

But in the Bitcoin world eASIC is perfect because we only need a short lifespan of the Chips to pay for the NRE + more even if they are inefficient.

Either way even if the Wafers are a tad more expensive than I'm led to believe, wafer costs are the lowest cost of this whole ordeal.

$15,000 Wafer (for example purposes)
2,500 Chips
16GH Chip
$0.375/GH


Edit: Either way none of this even matters because we have zero information and likely will continue to have zero information until there is a physical device ready.
I don't understand this way of business but at this point there's not much else we can do besides waiting for that day to come (or not)

In the ASIC industry there's also no standard pricing, everyone gets different deals for this and that so it's really hard to come up with what should cost what anyways.

First of all,  $1M is way lower than you would pay for a full maskset on 28nm. Depending on the number of layers and who you believe, that could easily cost $3-$5M. Im just talking about the physical mask, not the design.

Secondly, I dont think you understand how structured asics work. They cant be prefabricated, or at least no entirely. Easic may do wafers with some of the standard layers ready, but they will still need to be processed at the fab to implement the customized routing and extra layers. Its not like easic can take those from the shelve, its not an fpga. So whatever price you heard, is that for fully processed wafers, or preprocessed wafers? Either way, per wafer price is going to be (substantially) higher than for traditional asics, otherwise everyone would do it.