Algorithmically placed FPGA miner: 255MH/s/chip, supports all known boards - page 39.

BTCurious

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^SEM img of Si wafer edge, scanned 2012-3-12.

Quote from: sadpandatech on May 22, 2012, 01:02:55 PM

Quote from: MrTeal on May 22, 2012, 12:36:48 PM

ur math, check it. that would be 468.75MH/s assuming it is linear to the MHZ. And assuming they could cool it enough and the chip could handle the juice to keep error rate low.

? (300MH/s / 240MHz) * 300MHz = 375MH/s

aye, my math check it. i did (375MH/s / 240)* 300Mhz for the fail
[/quote]

But yeah, they only state that it "worked".

sadpandatech

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Quote from: MrTeal on May 22, 2012, 12:36:48 PM

ur math, check it. that would be 468.75MH/s assuming it is linear to the MHZ. And assuming they could cool it enough and the chip could handle the juice to keep error rate low.

Quote from: MrTeal on May 22, 2012, 12:36:48 PM

? (300MH/s / 240MHz) * 300MHz = 375MH/s

aye, my math check it. i did (375MH/s / 240)* 300Mhz for the fail

edit; fixed my broken quote..

MrTeal

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Quote from: sadpandatech on May 22, 2012, 12:32:47 PM

Quote from: BTCurious on May 22, 2012, 12:27:21 PM

Quote from: sadpandatech on May 22, 2012, 11:51:22 AM

Quote from: MrTeal on May 22, 2012, 11:29:21 AM

Quote from: Keninishna on May 22, 2012, 11:24:25 AM

you may want to take a look at this http://www.bitfury.org/xc6slx150.html these guys are claiming 435 mh/s per LX-150 Shocked

That seems to say on actual silicon they could only achieve 240MH/s (which is still quite good).

Very interesting read and if I am reading right they actually achieved 300MHs..

"Achieved resultThen we got following clock from Trace timing analysis tool - 2.968 ns design performance limitations. That's pretty cool - means 337 Mhz clock. You can view timing report by clicking here. And in our first prototype things seemed to work, but we have not analyzed error rates. When we have finished implementation of communication protocol with computer and measured error rates, we got bad luck, as with low error rates (below 0.5%) it functions only at 240 Mhz at core voltage 1.25 V (giving about 300 Mh/s and consuming acout 12W), and it still functions at 290 Mhz, but error rate is so high - about 85% of cores are giving errors. Also interesting detail, that if we strip and remove half of rounds, then it works at 290 Mhz well. 300 Mhz @ 1.25 V core voltage is undoable because of random hangs.

"

"One of our test chips worked at 300 Mhz at 1.5 V core, which is significantly above datasheet maximum allowed core voltage."
That's 375 MHash/sec

ur math, check it. that would be 468.75MH/s assuming it is linear to the MHZ. And assuming they could cool it enough and the chip could handle the juice to keep error rate low.

? (300MH/s / 240MHz) * 300MHz = 375MH/s

sadpandatech

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Quote from: BTCurious on May 22, 2012, 12:27:21 PM

Quote from: sadpandatech on May 22, 2012, 11:51:22 AM

Quote from: MrTeal on May 22, 2012, 11:29:21 AM

Quote from: Keninishna on May 22, 2012, 11:24:25 AM

you may want to take a look at this http://www.bitfury.org/xc6slx150.html these guys are claiming 435 mh/s per LX-150 Shocked

That seems to say on actual silicon they could only achieve 240MH/s (which is still quite good).

Very interesting read and if I am reading right they actually achieved 300MHs..

"Achieved resultThen we got following clock from Trace timing analysis tool - 2.968 ns design performance limitations. That's pretty cool - means 337 Mhz clock. You can view timing report by clicking here. And in our first prototype things seemed to work, but we have not analyzed error rates. When we have finished implementation of communication protocol with computer and measured error rates, we got bad luck, as with low error rates (below 0.5%) it functions only at 240 Mhz at core voltage 1.25 V (giving about 300 Mh/s and consuming acout 12W), and it still functions at 290 Mhz, but error rate is so high - about 85% of cores are giving errors. Also interesting detail, that if we strip and remove half of rounds, then it works at 290 Mhz well. 300 Mhz @ 1.25 V core voltage is undoable because of random hangs.

"

"One of our test chips worked at 300 Mhz at 1.5 V core, which is significantly above datasheet maximum allowed core voltage."
That's 375 MHash/sec

ur math, check it. that would be 468.75MH/s assuming it is linear to the MHZ. And assuming they could cool it enough and the chip could handle the juice to keep error rate low.

BTCurious

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Activity: 714

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^SEM img of Si wafer edge, scanned 2012-3-12.

Quote from: sadpandatech on May 22, 2012, 11:51:22 AM

Quote from: MrTeal on May 22, 2012, 11:29:21 AM

Quote from: Keninishna on May 22, 2012, 11:24:25 AM

you may want to take a look at this http://www.bitfury.org/xc6slx150.html these guys are claiming 435 mh/s per LX-150 Shocked

That seems to say on actual silicon they could only achieve 240MH/s (which is still quite good).

Very interesting read and if I am reading right they actually achieved 300MHs..

"Achieved resultThen we got following clock from Trace timing analysis tool - 2.968 ns design performance limitations. That's pretty cool - means 337 Mhz clock. You can view timing report by clicking here. And in our first prototype things seemed to work, but we have not analyzed error rates. When we have finished implementation of communication protocol with computer and measured error rates, we got bad luck, as with low error rates (below 0.5%) it functions only at 240 Mhz at core voltage 1.25 V (giving about 300 Mh/s and consuming acout 12W), and it still functions at 290 Mhz, but error rate is so high - about 85% of cores are giving errors. Also interesting detail, that if we strip and remove half of rounds, then it works at 290 Mhz well. 300 Mhz @ 1.25 V core voltage is undoable because of random hangs.

"

"One of our test chips worked at 300 Mhz at 1.5 V core, which is significantly above datasheet maximum allowed core voltage."
That's 375 MHash/sec

sadpandatech

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Activity: 504

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Quote from: MrTeal on May 22, 2012, 12:09:19 PM

I would love to see independent verification of any of these results. 300MH/s is 50% more than anyone else is currently running. At least with eldentyrell's there's been a long and incremental development time that lends credence to it. 300MH/s is a huge number.

aye, +100 there.

Quote from: ngzhang on May 22, 2012, 12:20:10 PM

on the personal front, i suggest stop doing any effort on these pipelined architecture.

wha chew talkin' bout, Willis?

ngzhang

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We will stand and fight.

on the personal front, i suggest stop doing any effort on these pipelined architecture.

MrTeal

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Quote from: sadpandatech on May 22, 2012, 11:51:22 AM

Quote from: MrTeal on May 22, 2012, 11:29:21 AM

Quote from: Keninishna on May 22, 2012, 11:24:25 AM

you may want to take a look at this http://www.bitfury.org/xc6slx150.html these guys are claiming 435 mh/s per LX-150 Shocked

That seems to say on actual silicon they could only achieve 240MH/s (which is still quite good).

Very interesting read and if I am reading right they actually achieved 300MHs..

"Achieved resultThen we got following clock from Trace timing analysis tool - 2.968 ns design performance limitations. That's pretty cool - means 337 Mhz clock. You can view timing report by clicking here. And in our first prototype things seemed to work, but we have not analyzed error rates. When we have finished implementation of communication protocol with computer and measured error rates, we got bad luck, as with low error rates (below 0.5%) it functions only at 240 Mhz at core voltage 1.25 V (giving about 300 Mh/s and consuming acout 12W), and it still functions at 290 Mhz, but error rate is so high - about 85% of cores are giving errors. Also interesting detail, that if we strip and remove half of rounds, then it works at 290 Mhz well. 300 Mhz @ 1.25 V core voltage is undoable because of random hangs.

"

Yeah, you're right there. I grabbed the wrong number there. I would love to see independent verification of any of these results. 300MH/s is 50% more than anyone else is currently running. At least with eldentyrell's there's been a long and incremental development time that lends credence to it. 300MH/s is a huge number.

sadpandatech

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Activity: 504

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Quote from: MrTeal on May 22, 2012, 11:29:21 AM

Quote from: Keninishna on May 22, 2012, 11:24:25 AM

you may want to take a look at this http://www.bitfury.org/xc6slx150.html these guys are claiming 435 mh/s per LX-150 Shocked

That seems to say on actual silicon they could only achieve 240MH/s (which is still quite good).

Very interesting read and if I am reading right they actually achieved 300MHs..

"Achieved resultThen we got following clock from Trace timing analysis tool - 2.968 ns design performance limitations. That's pretty cool - means 337 Mhz clock. You can view timing report by clicking here. And in our first prototype things seemed to work, but we have not analyzed error rates. When we have finished implementation of communication protocol with computer and measured error rates, we got bad luck, as with low error rates (below 0.5%) it functions only at 240 Mhz at core voltage 1.25 V (giving about 300 Mh/s and consuming acout 12W), and it still functions at 290 Mhz, but error rate is so high - about 85% of cores are giving errors. Also interesting detail, that if we strip and remove half of rounds, then it works at 290 Mhz well. 300 Mhz @ 1.25 V core voltage is undoable because of random hangs.

"

MrTeal

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Quote from: Keninishna on May 22, 2012, 11:24:25 AM

you may want to take a look at this http://www.bitfury.org/xc6slx150.html these guys are claiming 435 mh/s per LX-150 Shocked

That seems to say on actual silicon they could only achieve 240MH/s (which is still quite good).

Keninishna

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you may want to take a look at this http://www.bitfury.org/xc6slx150.html these guys are claiming 435 mh/s per LX-150 Shocked

TheSeven

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FPGA Mining LLC

Quote from: c_k on May 21, 2012, 05:45:51 PM

X6500 compatibility is what interests me

The x6500 uses regulators that are specified for 10A, and would probably work for 12-15A if there is enough airflow.
Actually we've heard reports of a case of a similar regulator surviving around 200% load for days, and that board seemed to run perfectly stable.

c_k

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Quote from: eldentyrell on May 21, 2012, 06:17:56 PM

Quote from: c_k on May 21, 2012, 05:17:08 AM

It's probably just counting down to the end of the month in your time zone

Hrm, I specified the time zone in the javascript code, so it should show the same countdown regardless of timezone.

I was only a guess based on different people having different times.

I noticed it stops counting when I go to another window/tab in safari on iOS

PatrickHarnett

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Quote from: eldentyrell on May 21, 2012, 06:17:56 PM

Quote from: c_k on May 21, 2012, 05:17:08 AM

It's probably just counting down to the end of the month in your time zone

Hrm, I specified the time zone in the javascript code, so it should show the same countdown regardless of timezone.

Interested and watching.

TargetDate = "5/31/2012 12:00 PM GMT-7";
BackColor = "white";
ForeColor = "black";
CountActive = true;
CountStepper = -1;
LeadingZero = true;
DisplayFormat = "%%D%%d %%H%%:%%M%%:%%S%%.%%SS%%";
FinishMessage = "It is finally here!";

eldentyrell

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felonious vagrancy, personified

Quote from: c_k on May 21, 2012, 05:17:08 AM

It's probably just counting down to the end of the month in your time zone

Hrm, I specified the time zone in the javascript code, so it should show the same countdown regardless of timezone.

c_k

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X6500 compatibility is what interests me

BR0KK

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i dont (hope) not than this wouldn't be good for his selling

Inspector 2211

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Quote from: c_k on May 21, 2012, 03:38:37 PM

I wonder if existing Spartan6 boards people have will require hardware changes for this firmware, like power related circuitry

He has already said that the ZTEX boards, including the latest and greatest 1.15y, will draw more power using his 1 1/2 miners (or 3 half-miners) compared to the original 210 MH/s ZTEX bitstream, and since they all have a 8 Amp DC/DC converter, the headroom is small. Just HOW small, I don't know.

c_k

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I wonder if existing Spartan6 boards people have will require hardware changes for this firmware, like power related circuitry

MrTeal

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It's just a countdown to his birthday. Cake and grief counseling will be available.

Topic: Algorithmically placed FPGA miner: 255MH/s/chip, supports all known boards - page 39. (Read 119440 times)