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Topic: Algorithmically placed FPGA miner: 255MH/s/chip, supports all known boards - page 40. (Read 119440 times)

hero member
Activity: 504
Merit: 500
FPGA Mining LLC
legendary
Activity: 938
Merit: 1000
What's a GPU?
Somebody at BFL just shat his pants.

False, but you did figure out what this is a countdown for Tongue
rjk
sr. member
Activity: 448
Merit: 250
1ngldh
What a tease. You'd better release something that goes 300 mhash/s at 10 watts, if you're going to keep us in suspense like this. Tongue
hero member
Activity: 784
Merit: 500
c_k
donator
Activity: 242
Merit: 100
It's probably just counting down to the end of the month in your time zone
hero member
Activity: 1596
Merit: 502
10d 7h on the spot Cheesy
Nice!
There is a bug on the website, here it is saying 10d 12h.
-5 hours have passed since Garr255 posted.
legendary
Activity: 938
Merit: 1000
What's a GPU?
donator
Activity: 980
Merit: 1004
felonious vagrancy, personified
full member
Activity: 209
Merit: 100
Spartan6 have a nice feature called chip DNA. It's unique 56 bit number. Device can read this, user thru JTAG also can read this. So, little program that read DNA thru JTAG and send this to server. Server makes personalized bitstream for that DNA and waits for payment. When payment is recived sends bitstream to buyer. That particular bitstream will only work with particular chip. And every one is happy, copying almost impossible.

No, the DNA register isn't useful for copy protection.   I use it to
keep track of which chips got which error rates at which
frequency/voltage, but not much else.

The DNA register is just a shift register, so if you can get the
design into fpga_editor all you have to do is disconnect two wires and
hook it up to an SRL32 instead; then you can make the design think the
chip has any DNA code you like.

I don't think Xilinx gives you a tool that turns .bit files into .ngc
files that fpga_editor can load, but I also wouldn't be surprised if
somebody else has written one.


It's also worth noting that the Spartan 6 engineering sample versions of the chips don't have the DNA register.
sr. member
Activity: 252
Merit: 250
Inactive
That wouldn't make me happy though. ...the source code of the program you used to place the elements.

Hey, I want a pony too, but I can manage to be happy without one. Smiley

I never got a pony and I've led a miserable life.
hero member
Activity: 504
Merit: 500
Would u be interested in one of the new Enterpoint Quad boards to try this bitstream on?


And have you come up with a pricing scheme or any ideas in that area yet?



cheers
donator
Activity: 980
Merit: 1004
felonious vagrancy, personified
Either way, if it is possible or not to hack a Ztex PCB this way needs to be confirmed by my colleague, who is putting the boards together. But my offer stands, I would volunteer to send you a (modified if possible or stock) 1.15y out of my production run so you have something to test.

Thanks for the offer!  I think I'm set for now, though.  I only need the ztex boards for power measurements... my own mining is done with my own boards (much cheaper than ztex boards, but lower quality and less power-efficient).  My personal boards also have upgradeable power supplies and software-adjustable voltage, which is really helpful for debugging and experimentation.

Speaking of which, here's another reason for the boardmakers to consider software-adjustable voltage supplies: every piece of mining equipment can be run until either (1) it fails or (2) the value of the BTC it produces falls below the cost of the electricity used.  FPGAs last a long time, so ultimately when you buy an FPGA miner you should plan on running it until several more generations of FPGAs have come out (which will each be more power-efficient than the last, ultimately driving up the difficulty).  We're talking about 2-3 years from now.

Anyways, power consumption scales linearly with clock rate, which (for a fixed design) scales linearly with performance.  However, the power consumption scales with the square of the voltage supplied.  This means that after 2-3 years you can underclock and undervolt your FPGA and keep it running profitably for another year or two.  I'm already doing this with Virtex-2 Pros.  I know that 2-3 years out is a long time horizon for bitcoiners, and many of the boardmakers may be out of business by then, but it's worth planning for.

Stefan would probably be the very best person to put something together for you, when I come to think of it. Or any of the other FPGA makers who design their own products, like ngzhang, FPGAMining LLC or the new UK company (not sure if you have a preference for Ztex though).

Like I said, I make my own boards.  The ztex board was only because my own boards leak power.

Edit: In fact I believe the designers/manufacturers are watching this thread for YOU to post some useful numbers so that they know what power requirements to use for any future products (I believe it has even been mentioned in one or two of their threads).

Yes, they email me constantly.  I've gotten very good at finding new and creative ways to say "I'm working on it". Smiley
donator
Activity: 980
Merit: 1004
felonious vagrancy, personified
the enterpoint unit, https://bitcointalksearch.org/topic/cairnsmore1-quad-xc6slx150-board-78239 , has four 12A regulators, are they enough?

A 12A regulator is enough power iff 265 MH/s is enough performance.
legendary
Activity: 1379
Merit: 1003
nec sine labore
Hi,

the enterpoint unit, https://bitcointalksearch.org/topic/cairnsmore1-quad-xc6slx150-board-78239 , has four 12A regulators, are they enough?


spiccioli
hero member
Activity: 489
Merit: 500
Immersionist
I am producing a batch of Ztex 1.15y boards under license, so I have blank PCBs which are supposed to go in the SMD line coming week or so. I don't think that the regulator I have been looking at (datasheet sent to you via email) is pin compatible, but I would think with a little bit of soldering it can be made to work (I could be completely wrong). Same for other components that need to be changed in the power chain.

In absolutely worst case, supplying the FPGAs their power from a different source might be a possibility for a test run. Either way, if it is possible or not to hack a Ztex PCB this way needs to be confirmed by my colleague, who is putting the boards together. But my offer stands, I would volunteer to send you a (modified if possible or stock) 1.15y out of my production run so you have something to test.

I don't think the Ztex products are designed for anything higher than 8A/FPGA, so this would only be for engineering tests, retrofitting is not what I had in mind. Stefan would probably be the very best person to put something together for you, when I come to think of it. Or any of the other FPGA makers who design their own products, like ngzhang, FPGAMining LLC or the new UK company (not sure if you have a preference for Ztex though).

Edit: In fact I believe the designers/manufacturers are watching this thread for YOU to post some useful numbers so that they know what power requirements to use for any future products (I believe it has even been mentioned in one or two of their threads).

donator
Activity: 980
Merit: 1004
felonious vagrancy, personified
I assume you did your test run on the Ztex 1.15x (single FPGA), not the 1.15y (quad FPGA) board?

Correct.  It's secondhand.

If you need a quad board for a while, let me know. There is a slight chance I could also place 4 15A regulators instead of the 8A stock ones on a board for your tests.

Hrm, don't think that'll be necessary, but out of curiosity, how do you do this?  Is there a pin-compatible 15A version of the chip ztex is using?  Do you desolder the old one (yikes!)?  Doesn't this necessitate changing some of the other components in the power supply circuitry, like the inductor loop?

On the upside, if this is possible, maybe ztex will start offering 15A boards as an option.  Or somebody might go into business reworking the 8A boards, although I'm not sure that's cost-effective... board rework is really expensive.
hero member
Activity: 489
Merit: 500
Immersionist
I assume you did your test run on the Ztex 1.15x (single FPGA), not the 1.15y (quad FPGA) board?

If you need a quad board for a while, let me know. There is a slight chance I could also place 4 15A regulators instead of the 8A stock ones on a board for your tests.
donator
Activity: 980
Merit: 1004
felonious vagrancy, personified
My ztex board finally arrived yesterday; I've posted very-preliminary power numbers.  I still have at least one power-reduction trick up my sleeve, but I don't think it's going to close the gap.  You should expect my design to give fewer MH/J than ztex's design; that much is certain.
legendary
Activity: 1666
Merit: 1057
Marketing manager - GO MP
That wouldn't make me happy though. ...the source code of the program you used to place the elements.

Hey, I want a pony too, but I can manage to be happy without one. Smiley

What's for the farm?

scnr  Grin
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