Topic: BFL ASIC specifications - page 3. (Read 4272 times)

Do you care to speculate what could be the specific mistake that the BFL's designers made?

For example eldentyrell speculated a while back that they made their simulations at the default temperature chosen by SPICE in absence of specific setting: 25 deg C.

https://bitcointalksearch.org/topic/wild-and-unsubstantiated-speculation-about-bfls-power-woes-166321

Obviously, we don't have sufficient information to make a real assesment; but I think even making a scientific wild ass guess will have some educational value for the readership of this forum.

No other account.  Just someone who is familiar with IC design and thinks such a small chip (7.5mm^2) consisting of no more than 16k 32-bit adders on a process that yields such low clock rates (for example see: http://ieeexplore.ieee.org/xpl/login.jsp?tp=&arnumber=4253311) and high defect rates (to quote from your original link: "A grade has 16 engines, B grade has 15 engines, C grade has 14 engines and D grade has no less than 12 engines.  All chips run at a minimum of 250 mhz.  Higher grade chips will run up to 294mhz.  The percentage distribution in each lot is 60% Grade A, 20% Grade B, 15% Grade C and 5% Grade D.").

If the error rate was this high, a single 300mm wafer would be luckly to yield one working consumer graphics card.

12 posts and already trolling, what's the name of your other account?

They must have found the shittiest design and verification engineers on the planet to get such low performance from a full custom 65nm asic.  Further, for a chip with such little logic on it their yields are crap.

My guess would be they used shitty engineers and global foundaries' standard cell library, the engineers didn't setup their simulations correctly and as such the cores fail under even the slightest real world heat.  This guess is additionally backed up by the high hardware error to accepted rates posted in screenshots by various Jalapeno recipients.   I would guess that the estimated hash rate on the pool side is much lower than the promised 5 gh/s.

Global Foundries are the world's second largest independent  semiconductor foundry. It use to be called AMD if you remember that little company, they sold off their fab which became Global Foundries, they are not noobs.

Bullshit. They should change the supplier.

Taken from:

https://products.butterflylabs.com/65nm-asic-bitcoin-mining-chip.html







65 nm ASIC Mining Chip
4 GH/s Calculation Speed


Specifications:


    Technology: Global Foundries advanced 65nm technology (IBM core)

    Die size: 7.5 x 7.5 mm

    Substrate package: 10 x 10 mm

    Package type: Standard BGA 144

    Design type: 100% Hand routed for performance density

    Power consumption: 3.2 Watt per GH/s

    Performance: 4 GH/s

    Performance design: 16 engines @ 250mhz nominal (294mhz max)


Advantages of Butterfly Labs chips:


    1/2 the power usage per GH as the closest competitor

    1/10th the silicon area per GH as the closest competitor (Very high performance density)

    Proven design currently operating in the field and ready to go.

    Unlike some QFN packages which require underside heat sinks, you can use off the shelf heat sinks due to the FCBGA package. No need to design and manufacture heat sinks!


Terms of purchase:


    Delivery:  100 days

    Payment:  50% deposit on order and 50% upon delivery

    Cancellation:  All sales are final and deposits will not be returned if final payment is not made prior to delivery.

    Minimum purchase:  100 chips


Considerations:


    Chip grades:  Chips come in four grades of performance.  Chips are sold in mixed grade lots.  A grade has 16 engines, B grade has 15 engines, C grade has 14 engines and D grade has no less than 12 engines.  All chips run at a minimum of 250 mhz.  Higher grade chips will run up to 294mhz.  The percentage distribution in each lot is 60% Grade A, 20% Grade B, 15% Grade C and 5% Grade D.

    Reference documentation:  Butterfly Labs is releasing it's PCB schematics & MCU code to open source.  Links to this documentation will follow shortly.

    Limited availability:  Chip availability is limited to 100,000 units.

https://www.youtube.com/watch?v=YhsKCnDD3F8 chip production