Ok a short update on progress with glasswalker's build that we are playing with. We have this now running on 3 FPGAs with a good stability and good mining results currently at a 175MHz clock rate. The 4th FPGA position still has some problems and we have a few more things that may make it viable in it's current form yet to try. Either running as 3 or 4 FPGAs we will aim to make a controller release available for it later today as it will give you all better hashing rates and U values. We will discuss with glasswalker how current bitstream is released and there may be more than one variant of the bitstream to suit each FPGA's particular needs.
The current issues are related to noise on the com lines which coupled with a weak UART design which either allow a false edge trigger and/or incorrect data to be received. At the penalty of a rebuild this can be fixed with a more robust UART design should the other methods that we are currently playing with fail.
Well, I guess that explains a lot... The current issues are related to noise on the com lines which coupled with a weak UART design which either allow a false edge trigger and/or incorrect data to be received. At the penalty of a rebuild this can be fixed with a more robust UART design should the other methods that we are currently playing with fail.
