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Topic: Custom RAM Timings for GPU's with GDDR5 - DOWNLOAD LINKS - UPDATED - page 29. (Read 155645 times)

sr. member
Activity: 418
Merit: 250
dumb question to everyone running custom timings on 6-GPU rigs,  


how are you making it easy to manage (for example, when you have to boot up multiple rigs)  
  
are you mixing rx480's with hynix and elpida RAM in the same box, and using some tool (claymore commandline arguments, MSI Afterburner auto-overclock on boot) to get each card at the desired RAM frequency?

or are you keeping all elipda / hynix / micron cards together in separate boxes?

or can you hard-code the "GPU State 7" / "RAM State 1" frequencies in Polaris Editor, so each card takes care of itself?

or are you booting up each box, then manually tweaking the GPU/RAM frequencies and voltage with your desired tool (wattman, trixx, msi afterburner) and then just not touching it for months until it has to reboot again ?
  
sr. member
Activity: 488
Merit: 322
Laik, it's the 8Gb version i have. I do have the 4gb version too which i can clock to 30mhs no problem. Just the 8gb which is being a pain.
Strange...if its 8gb version default clock should be 2000Mhz...original 1750/2000 straps, please?

The 1750 strap is 777000000000000022CC1C00106A6D4DD0571016B90D060C006AE70014051420FA8900A00300000 01B11333DC0303A17
The 2000 strap is 777000000000000022CC1C0031F67E57F05711183FCFB60D006C070124081420FA8900A00300000 01E123A46DB354019

Thanks Smiley
sr. member
Activity: 652
Merit: 266
Laik, it's the 8Gb version i have. I do have the 4gb version too which i can clock to 30mhs no problem. Just the 8gb which is being a pain.
Strange...if its 8gb version default clock should be 2000Mhz...original 1750/2000 straps, please?
sr. member
Activity: 488
Merit: 322
Laik, it's the 8Gb version i have. I do have the 4gb version too which i can clock to 30mhs no problem. Just the 8gb which is being a pain.
sr. member
Activity: 652
Merit: 266
I have been trying to get my rx480 asus dual stable above 2000Mhz memory and 1150Mhz on the core, the strap i am using is this one 777000000000000022CC1C00106A5D4DD0571016B90D060C0060070014051420FA8900A00300000 01011333DC0303A17

Its samsung memory on the card but everytime i get it above 2000 it is crashing. Does anyone have any tips for this?
Just crashed at 1950Mhz too.

c:\bios>ohgodadecode 777000000000000022CC1C00106A5D4DD0571016B90D060C0060070014051420FA8900A00300000 01011333DC0303A17
TRCDW = 16
TRCDWA = 16
TRCDR = 26
TRCDRA = 26
TRRD = 5
TRC = 77
Pad0 = 0

TNOPW = 0
TNOPR = 0
TR2W = 29
TCCDL = 3
TR2R = 5
TW2R = 16
Pad0 = 0
TCL = 22
Pad1 = 0

TRP_WRA = 57
Pad0 = 2
TRP_RDA = 13
TRP = 24
TRFC = 192

PA2RDATA = 0
Pad0 = 0
PA2WDATA = 0
Pad1 = 0
TFAW = 0
TCRCRL = 3
TCRCWL = 7
TFAW32 = 0

MC_SEQ_MISC1: 0x20140514

MC_SEQ_MISC3: 0xA00089FA

MC_SEQ_MISC8: 0x00000003

ACTRD = 16
ACTWR = 17
RASMACTRD = 51
RASMACTWR = 61

RAS2RAS = 192
RP = 48
WRPLUSRP = 58
BUS_TURN = 23
This timing is for 8GB GPU, I assume yours is 4GB.
MC_ARB_DRAM_TIMING1/2 are wrong and probably that's what's causing crashing as well as no heatsink on ram modules.
sr. member
Activity: 488
Merit: 322
I have been trying to get my rx480 asus dual stable above 2000Mhz memory and 1150Mhz on the core, the strap i am using is this one 777000000000000022CC1C00106A5D4DD0571016B90D060C0060070014051420FA8900A00300000 01011333DC0303A17

Its samsung memory on the card but everytime i get it above 2000 it is crashing. Does anyone have any tips for this?
Just crashed at 1950Mhz too.

c:\bios>ohgodadecode 777000000000000022CC1C00106A5D4DD0571016B90D060C0060070014051420FA8900A00300000 01011333DC0303A17
TRCDW = 16
TRCDWA = 16
TRCDR = 26
TRCDRA = 26
TRRD = 5
TRC = 77
Pad0 = 0

TNOPW = 0
TNOPR = 0
TR2W = 29
TCCDL = 3
TR2R = 5
TW2R = 16
Pad0 = 0
TCL = 22
Pad1 = 0

TRP_WRA = 57
Pad0 = 2
TRP_RDA = 13
TRP = 24
TRFC = 192

PA2RDATA = 0
Pad0 = 0
PA2WDATA = 0
Pad1 = 0
TFAW = 0
TCRCRL = 3
TCRCWL = 7
TFAW32 = 0

MC_SEQ_MISC1: 0x20140514

MC_SEQ_MISC3: 0xA00089FA

MC_SEQ_MISC8: 0x00000003

ACTRD = 16
ACTWR = 17
RASMACTRD = 51
RASMACTWR = 61

RAS2RAS = 192
RP = 48
WRPLUSRP = 58
BUS_TURN = 23
member
Activity: 126
Merit: 10
You're right, the Micron straps are identical

Why are you saying it is Micron?
VRAMInfo in bios you uploaded only contains data for EDW4032BABG(Elpida) and H5GC4H24AJR(Hynix).

EDIT: Okay, technicaly in 2013 there was acquisition of Elpida by Micron (so now EDW4032BABG is Micron) but given timing table is for Hynix anyway.


GPU-z says Micron.


Then you should probably edit timings for type 1 (EDW4032BABG) not type 2(H5GC4H24AJR).
member
Activity: 129
Merit: 10
You're right, the Micron straps are identical

Why are you saying it is Micron?
VRAMInfo in bios you uploaded only contains data for EDW4032BABG(Elpida) and H5GC4H24AJR(Hynix).

EDIT: Okay, technicaly in 2013 there was acquisition of Elpida by Micron (so now EDW4032BABG is Micron) but given timing table is for Hynix anyway.


GPU-z says Micron.
member
Activity: 126
Merit: 10
You're right, the Micron straps are identical

Why are you saying it is Micron?
VRAMInfo in bios you uploaded only contains data for EDW4032BABG(Elpida) and H5GC4H24AJR(Hynix).

EDIT: Okay, technicaly in 2013 there was acquisition of Elpida by Micron (so now EDW4032BABG is Micron) but given timing table is for Hynix anyway.
hero member
Activity: 2548
Merit: 626
member
Activity: 81
Merit: 1002
It was only the wind.
AMD's UMR tool makes setting many registers a lot easier than it used to be, it's good to keep around for changing register values...

It's almost information overload though...  And I still find organizing the CUs into engines and shader groups confusing.  I'd just number them from 0..

Code:
~/git/umr/build/src/app$ sudo ./umr -wa | head -25
SE SH CU SIMD WAVE# WAVE_STATUS PC_HI PC_LO INST_DW0 INST_DW1 EXEC_HI EXEC_LO HW_ID GPRALLOC LDSALLOC TRAPSTS IBSTS TBA_HI TBA_LO TMA_HI TMA_LO IB_DBG0 M0
0 0 1 0 0 00010c01 00000001 046737e0 bf8c0070 00024b1f ffffffff ffffffff 40620100 01001700 0000c098 20000000 00006000 00000000 00000000 00000000 00000000 00000b06 00010000
>SGPRS[0..3] = { ffffffff, 00000040, 77777777, 77777777 }
>SGPRS[4..7] = { 040fbf00, 00000001, 00f3fffd, 00000010 }
>SGPRS[8..11] = { 083b0000, 00000001, ffffffff, ffffffff }
>SGPRS[12..15] = { bbbbbbbb, bbbbbbbb, 44444444, 44444444 }
>SGPRS[16..19] = { 44444444, 44444444, 2698ede5, 4044d6c3 }
>SGPRS[20..23] = { 0000000f, d77e3ff3, 9e8676f6, fc0d519a }
>SGPRS[24..27] = { 04543881, 7b52b071, d6470a37, 8cc0ba31 }
>SGPRS[28..31] = { 0a3dbeae, 7db6ab47, 00000000, 00000000 }
>pgm[6@1046737d0] = d285001e
>pgm[6@1046737d4] = 00024b1e
>pgm[6@1046737d8] = d285000b
>pgm[6@1046737dc] = 00024b0b
>pgm[6@1046737e0] = bf8c0070
>pgm[6@1046737e4] = 2a3e5f1f
>pgm[6@1046737e8] = 2a365d1b
>pgm[6@1046737ec] = 2a485b24

p.s. I'm finding it seems to have copied the out-of-date register bitfields used in the kernel.  For example mmMC_ARB_RFSH_RATE supposedly only uses the lower 8 bits for powermode0, but I'm seeing values in the upper 16 bits too.


I'm loving UMR Cheesy
hero member
Activity: 2548
Merit: 626
Try with this :

https://github.com/IojkinKot/PolarisBiosEditor

Dallase, could you upload that 570 rom please ?

Edit1:

You can easily fix checksum with ohgod..tool : https://mega.nz/#!zIwVXL4B!IUQOXRqWDw6L15rvN5gBgBN0hxc6ncQu5YcnG41m90g

Edit2:
I see now that 480 micron rom was uploaded & modified by me, but why do you want to open it in hawaiireader ? Cheesy
480 are polaris cards, not hawaii Cheesy

You mean PBE doesn't work?!
It does work, most 5xx bioses now contain 2 memory profiles, like elpida/micron 4xx.


There is a fork on github that already supports the 570/580 BIOS, I cannot recall which one offhand but it's one of the recently active forks...

unable to find it, can you help ?
legendary
Activity: 1428
Merit: 1000
https://www.bitworks.io
Try with this :

https://github.com/IojkinKot/PolarisBiosEditor

Dallase, could you upload that 570 rom please ?

Edit1:

You can easily fix checksum with ohgod..tool : https://mega.nz/#!zIwVXL4B!IUQOXRqWDw6L15rvN5gBgBN0hxc6ncQu5YcnG41m90g

Edit2:
I see now that 480 micron rom was uploaded & modified by me, but why do you want to open it in hawaiireader ? Cheesy
480 are polaris cards, not hawaii Cheesy

You mean PBE doesn't work?!
It does work, most 5xx bioses now contain 2 memory profiles, like elpida/micron 4xx.


There is a fork on github that already supports the 570/580 BIOS, I cannot recall which one offhand but it's one of the recently active forks...
member
Activity: 129
Merit: 10

Better to use hex editor. You can see that the real straps actually begin about halfway through the lines you posted and that this BIOS supports 2 different memory types.

Thats what I ended up doing.  I've pulled out the straps (v02's) it uses here

Code:
MICRON

409C0002 (400mhz)
555000000000000022DD1C0084941212F0540B0795847102002041001B0414209A8800A00000312006050D0E270F160E
80380102 (800mhz)
777000000000000022DD1C00E7AC352210550D0A20C7F20400248100340914209A8800A0000031200C08171B4F172110
905F0102 (900mhz)
777000000000000022DD1C002931462620550E0BA20793050026A2003C0A1420AA8800A0000031200D0A1A1D59192311
A0860102 (1000mhz)
777000000000000022DD1C0029B5462930550E0C244823060026A200440B1420AA8800A0000031200E0A1C20621B2511
74B70102 (1125mhz)
777000000000000022FF1C006BBD572F40550F0D28C9F3060048C5004C0D14205A8900A000003120100C20246F1E2912
48E80102 (1250mhz)
777000000000000022FF1C008CC5583460550F0F2C4AB4070048C5005C0F14205A8900A000003120120D23287B222D13
1C190202 (1375mhz)
777000000000000022339D00CECD593980551111AE8A84080048C6006C0014206A8900A002003120140F262B88252F15
A42C0202 (1425mhz)
777000000000000022339D00CE516A3B805511112FCBD408004AE6006C0014206A8900A002003120150F272D8D263015
F0490202 (1500mhz)
777000000000000022339D00CE516A3D9055111230CB4409004AE600740114206A8900A002003120150F292F94273116
C47A0202 (1625mhz)
999000000000000022559D0010DE7B4480551312B78C450A004C0601750414206A8900A00200312018112D34A42A3816
98AB0202 (1750mhz)
999000000000000022559D0031627C489055131339CDD50A004C06017D0514206A8900A00200312019123037AD2C3A17
400D0302 (2000mhz)
BBB000000000000022889D0073EE8D53805515133ECF560C004E26017E0514206A8900A0020031201C143840C5303F17

The v01 straps for hynix are also in there, but the card does not use them.   Wish Polaris Bios Editor supported this.

To me it looks like Hynix H5GC4H24AJR timings (exact copy).


You're right, the Micron straps are identical
member
Activity: 129
Merit: 10
Try with this :

https://github.com/IojkinKot/PolarisBiosEditor

Dallase, could you upload that 570 rom please ?

Edit1:

You can easily fix checksum with ohgod..tool : https://mega.nz/#!zIwVXL4B!IUQOXRqWDw6L15rvN5gBgBN0hxc6ncQu5YcnG41m90g

Edit2:
I see now that 480 micron rom was uploaded & modified by me, but why do you want to open it in hawaiireader ? Cheesy
480 are polaris cards, not hawaii Cheesy

stock-micron-rx570.rom @ https://ufile.io/yjdb4   (this is from MSI RX 570 4G Micron)

If you edit the bios manually and need to fix the checksum, you can load a Polaris rom in Hawaiireader (it will say unsupported rom), and then click save and it will just fix the checksum.  

I loaded the stock-micron-rx570.rom above, and just changed core and mem clocks, no strap edits, and saved in PBE.   Ubuntu kernel panics resulted.  Had to reflash to stock, and then manually edit and fix checksum.


hero member
Activity: 2548
Merit: 626
it MUST work, but i don't understand why is he trying to open a 470/480/570/580 bios with hawaiibios editor ?! Cheesy
member
Activity: 126
Merit: 10
Mine are correct.   From a chip-design perspective, masking off the "unused" bits would actually add complexity.  The simple, and most logical conclusion is that the fields can store larger values than are required by the specs for currently-produced GDDR5 RAM.  I also suspect if anyone took the time to look at the JEDEC GDDR5 spec, you'd at least see tRP needs to support more than 5 bits (max 31).

To be 100% certain, on my Rx470 (Samsung K4G4) I changed MC_SEQ_MISC_TIMING: 0x09D82033
TRP_WRA=51 TRP_RDA=64 TRP=32 TRFC=157 Pad0=0

With my tweaked strap using 0x09D50CB3 I was getting 29.3Mh/s, and with only the high bit of RP_RDA and RP set, hashrate dropped to 23.1.  I let it run for 15 minutes with those timings and it was stable.

I suspect for GCN1.2 devices (i.e. Tonga) that use the R9 SEQ_MISC format that RP_RDA is actually 7 bits, not 6 plus a 1-bit pad before tRP.

It is possible that we are both 'correct'.
The definition of MC_SEQ_MISC_TIMING in linux kernel is old
and corresponds to definition of MC_SEQ_MISC_TIMING in leaked(?) RAI register description file for Bonaire which is old too.
It is possible that definition of MC_SEQ_MISC_TIMING in newer architectures is different up to paddings.
sr. member
Activity: 652
Merit: 266
Try with this :

https://github.com/IojkinKot/PolarisBiosEditor

Dallase, could you upload that 570 rom please ?

Edit1:

You can easily fix checksum with ohgod..tool : https://mega.nz/#!zIwVXL4B!IUQOXRqWDw6L15rvN5gBgBN0hxc6ncQu5YcnG41m90g

Edit2:
I see now that 480 micron rom was uploaded & modified by me, but why do you want to open it in hawaiireader ? Cheesy
480 are polaris cards, not hawaii Cheesy

You mean PBE doesn't work?!
It does work, most 5xx bioses now contain 2 memory profiles, like elpida/micron 4xx.
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