Thank you so much for releasing those tool! They are amazing and allows us normal to deal with HEX.
Usually what can be the improvement from a shitty copied timing vs a carefully crafted rom? I'm talking about both power consume and hashrate
Topic: Custom RAM Timings for GPU's with GDDR5 - DOWNLOAD LINKS - UPDATED - page 39. (Read 155485 times)
March 26, 2017, 05:29:56 PM
March 26, 2017, 05:21:17 PM
It's based on the 1625 strap, since the 1500 strap wasn't stable for me beyond 1875.
That's very strange, I have several rx with hynix and the 1500 strap is the most stable at least up to 2050.Maybe your cards have better cooling for the RAM? This is an Asus Strix. After tuning the 1625 strap, it was stable at ~27.2Mh with a 1950 mem clock. Now I'm testing 2000.
I may try your strap on a gygabyte rx 480, VRM stays very cool on that card. I'll let you now.
March 26, 2017, 04:47:35 PM
It's based on the 1625 strap, since the 1500 strap wasn't stable for me beyond 1875.
That's very strange, I have several rx with hynix and the 1500 strap is the most stable at least up to 2050.Maybe your cards have better cooling for the RAM? This is an Asus Strix. After tuning the 1625 strap, it was stable at ~27.2Mh with a 1950 mem clock. Now I'm testing 2000.
I may try your strap on a gygabyte rx 480, VRM stays very cool on that card. I'll let you now.
March 24, 2017, 09:52:07 AM
Glad to hear you're working on a new kernel tuned for Polaris, as you're still better than me when it comes to writing optimized kernels. Tonga seems to have a limit of 92-93% of the peak memory bandwidth for eth mining, so for a R9 380 clocked at 840/1500, that's just over 22Mh. For people that haven't read all my old posts, it's physically impossible to get more than 24Mh (192GB/s memory bandwidth / 8KB ethash reads).
For a Rx 480 clocked at 2Ghz, 92% efficiency would be 29.5Mh, and that should be doable with a core clock of 1100. However I don't recall seeing anyone getting over 29Mh without going over 2Ghz for the memory clock.
For a Rx 480 clocked at 2Ghz, 92% efficiency would be 29.5Mh, and that should be doable with a core clock of 1100. However I don't recall seeing anyone getting over 29Mh without going over 2Ghz for the memory clock.
Better to bring the mem clock up a lot more, after loosening the timings a bit. And you can get more than 24MH/s - just obviously not at 1500Mhz memclk.
Agreed, though I find 1625 to be about average for what I can OC the RAM on Tonga cards. The best I had was a MSI R9 380 gaming that had heat spreaders on Samsung RAM, which was stable at 1700Mhz. The worst is a MSI Armor2X with cooling for only 3 of the 8 Elpida RAM chips, and is not stable over 1550.
Bump VDDCI, drop temps any way you can?
March 26, 2017, 04:39:24 PM
It's based on the 1625 strap, since the 1500 strap wasn't stable for me beyond 1875.
That's very strange, I have several rx with hynix and the 1500 strap is the most stable at least up to 2050.Maybe your cards have better cooling for the RAM? This is an Asus Strix. After tuning the 1625 strap, it was stable at ~27.2Mh with a 1950 mem clock. Now I'm testing 2000.
If it's a Strix you might have memory voltage control, have you tried/checked this?
March 26, 2017, 04:04:42 PM
Are there any publicly available custom memory strap timings for the rx 400 series? (samsung, elpida, or hynix)
Here's the Samsung strap I'm currently working on:
777000000000000022CC1C0010625C49D0571016B50BD50900400700140514207A8900A00300000 0191131399D2C3617
It's the 1750 strap with RRD=5, FAW&32AW=0. It's stable at 2100 on my Sapphire Rx470. The previous custom strap I tried was based on the 1625 strap, and I would start getting a lot of errors over 2000. I just started working on it today, so there's more tweaking to do (like trying a lower tRC for RAS).
Lets see the final results.
Small adjustments to your timing based on my experience : 777000000000000022CC1C00CE615C45C0571016B30CD50900400700140514207A8900A00300000 0151031399D2C3617
Thanks! Nice improvement over the regular 1750 strap. Now the question is... will this 1750 samsung strap work with 480s with samsung (and then both 4gb and 8gb?)
If you have one of the first 4G samsung batches, it will work and even improve even more. (because you can unlock those to 8G)
If you have a newer batch of those 4G samsung's, it will most probably run but won't run stable.
Greetings
Why won't it be stable? Would this only be stable for reference cards?
Different chips, but both Samsung.
Is there a way to know if the chips are different? I'm looking in Polaris Bios Editor and I see my old samsung chips are K4G8 while new ones are K4G4.. device id seems the same with them 0x91
March 26, 2017, 03:52:15 PM
It's based on the 1625 strap, since the 1500 strap wasn't stable for me beyond 1875.
That's very strange, I have several rx with hynix and the 1500 strap is the most stable at least up to 2050.Maybe your cards have better cooling for the RAM? This is an Asus Strix. After tuning the 1625 strap, it was stable at ~27.2Mh with a 1950 mem clock. Now I'm testing 2000.
March 24, 2017, 07:29:01 AM
Yea I got a batch of Samsung based reference saph 470s and manually added the offsets, but for some reason the gpu would not post with the offset added. Weird cause offsets on Hynix/micron cards worked fine. Never had time to investigate this.
What location were you adding the offsets at? Because I don't think they can be added at A992 for cards that dont already have a programmed offset built in.
Maybe the learned folk on this thread could shed some light on how to go about adding an offset location to a bios that doesn't have one.
I wrote a program to do it: https://github.com/OhGodACompany/OhGodATool -- OhGodAnOffset
March 26, 2017, 03:49:22 PM
I just figured out ohgodadecode has the wrong structure for MISC_TIMING. Here's a Hynix 1625 strap that shows it: 999000000000000022559D0010DE7B4480551312B78C450A004C0601750414206A8900A00200312 018112D34A42A3816
Here's how I think it should be:
I think the way it was defined is probably correct for R9 series cards, not Rx.
Here's the correct structure, it was stated earlier in niko2004x's post.Here's how I think it should be:
Code:
typedef struct _SEQ_MISC_TIMING_FORMAT
{
uint32_t TRP_WRA : 7;
uint32_t TRP_RDA : 7;
uint32_t TRP : 6;
uint32_t TRFC : 9;
uint32_t Pad0 : 3;
} SEQ_MISC_TIMING_FORMAT;
I think the way it was defined is probably correct for R9 series cards, not Rx.
RX
Quote
struct {
uint32_t trp_wra : 7 ;
uint32_t trp_rda : 6 ;
uint32_t m1Pad0 : 1 ;
uint32_t trp : 5 ;
uint32_t m1Pad1 : 1 ;
uint32_t trfc : 9 ;
uint32_t m1Pad2 : 3 ;
} mc_seq_misc_timing;
uint32_t trp_wra : 7 ;
uint32_t trp_rda : 6 ;
uint32_t m1Pad0 : 1 ;
uint32_t trp : 5 ;
uint32_t m1Pad1 : 1 ;
uint32_t trfc : 9 ;
uint32_t m1Pad2 : 3 ;
} mc_seq_misc_timing;
R9
Quote
struct {
uint32_t trp_wra : 6 ;
uint32_t m1Pad0 : 2 ;
uint32_t trp_rda : 6 ;
uint32_t m1Pad1 : 1 ;
uint32_t trp : 5 ;
uint32_t trfc : 9 ;
uint32_t m1Pad2 : 3 ;
} mc_seq_misc_timing;
uint32_t trp_wra : 6 ;
uint32_t m1Pad0 : 2 ;
uint32_t trp_rda : 6 ;
uint32_t m1Pad1 : 1 ;
uint32_t trp : 5 ;
uint32_t trfc : 9 ;
uint32_t m1Pad2 : 3 ;
} mc_seq_misc_timing;
Nice to know we all arrived to the same structures.
I think mine is better. I think there is really 7 bits for RP_RDA, and 6 for tRP, but none of the existing straps use the highest bit.
Easy to test.
Set RP_RDA and/or TRP to 0 up to the highest bit (set it to 1) for some high mclk strap. Did not check myself if it is 'crash and burn' or working.
About existing straps you are right.
For RX series maximum values in existings straps are RP_RDA=033, TRP=029 in cards with Micron MT51J256M32HF and Elpida EDW4032BABG.
March 26, 2017, 03:43:47 PM
It's based on the 1625 strap, since the 1500 strap wasn't stable for me beyond 1875.
That's very strange, I have several rx with hynix and the 1500 strap is the most stable at least up to 2050.He's on Samsung - that's why - Hynix/Elpida, usually 1500 is fine.
No, that's my Asus Strix 470 with Hynix. My Sapphire ref has Samsung.
And I figured out my problem was 32AW. I thought I had zero'd it but it was still at 8. With 32AW=0 now it gets ~27.1 instead of ~24.2 at 1950.
999000000000000022559D0010DE5B4480551312B74C450A00400600750414206A8900A00200312 010112D34A42A3816
March 23, 2017, 09:23:35 PM
You'll be happy to know your comment about a better Eth implementation (a long time ago) not increasing speed if not core-limited was correct. I finally got around to writing something really nice for Polaris (still tweaking it) - and while at low memclocks it does almost nothing, when you bump memclk and drop core for undervolting, it's faster.
Glad to hear you're working on a new kernel tuned for Polaris, as you're still better than me when it comes to writing optimized kernels. Tonga seems to have a limit of 92-93% of the peak memory bandwidth for eth mining, so for a R9 380 clocked at 840/1500, that's just over 22Mh. For people that haven't read all my old posts, it's physically impossible to get more than 24Mh (192GB/s memory bandwidth / 8KB ethash reads).
For a Rx 480 clocked at 2Ghz, 92% efficiency would be 29.5Mh, and that should be doable with a core clock of 1100. However I don't recall seeing anyone getting over 29Mh without going over 2Ghz for the memory clock.
Better to bring the mem clock up a lot more, after loosening the timings a bit. And you can get more than 24MH/s - just obviously not at 1500Mhz memclk.
March 26, 2017, 02:37:52 PM
Are there any publicly available custom memory strap timings for the rx 400 series? (samsung, elpida, or hynix)
Here's the Samsung strap I'm currently working on:
777000000000000022CC1C0010625C49D0571016B50BD50900400700140514207A8900A00300000 0191131399D2C3617
It's the 1750 strap with RRD=5, FAW&32AW=0. It's stable at 2100 on my Sapphire Rx470. The previous custom strap I tried was based on the 1625 strap, and I would start getting a lot of errors over 2000. I just started working on it today, so there's more tweaking to do (like trying a lower tRC for RAS).
Lets see the final results.
Small adjustments to your timing based on my experience : 777000000000000022CC1C00CE615C45C0571016B30CD50900400700140514207A8900A00300000 0151031399D2C3617
Thanks! Nice improvement over the regular 1750 strap. Now the question is... will this 1750 samsung strap work with 480s with samsung (and then both 4gb and 8gb?)
If you have one of the first 4G samsung batches, it will work and even improve even more. (because you can unlock those to 8G)
If you have a newer batch of those 4G samsung's, it will most probably run but won't run stable.
Greetings
Why won't it be stable? Would this only be stable for reference cards?
EDIT: after reading for a bit I saw something about it was only for K4G4 (something like this?) which im guessing means theres different samsung memory modules
March 26, 2017, 02:25:49 PM
It's based on the 1625 strap, since the 1500 strap wasn't stable for me beyond 1875.
That's very strange, I have several rx with hynix and the 1500 strap is the most stable at least up to 2050. March 23, 2017, 07:19:32 PM
Kinda OT since this is a RAM Timings thread, but ill ask this anyways :
For Sapphire RX 470 4GB (Ref) cards GPU Core Volt offset is at A992 correct?
Now for the cards with Hynix memory, I find the default 04 which is 4 X 6.25 or +25mv, which seems legit.
But for the cards with Samsung memory, the value at A992 is FF which is -1 X 6.25 or -6.25mv, so something looks off.
Do different memory versions of the card have different default offset values? Or is the location different?
Any help/guidance would be appriciated.
For Sapphire RX 470 4GB (Ref) cards GPU Core Volt offset is at A992 correct?
Now for the cards with Hynix memory, I find the default 04 which is 4 X 6.25 or +25mv, which seems legit.
But for the cards with Samsung memory, the value at A992 is FF which is -1 X 6.25 or -6.25mv, so something looks off.
Do different memory versions of the card have different default offset values? Or is the location different?
Any help/guidance would be appriciated.
Seems like the samsung one doesn't have global offset.
Stock roms with global offset have either '03' +18.75mV value or '04' +25mV as VDDC offset.
I've never seen something else, or rather negative offset.. and i've opened up a lot of them ;-) 'But correct me if i'm wrong..'
Greetings.
Yea I got a batch of Samsung based reference saph 470s and manually added the offsets, but for some reason the gpu would not post with the offset added. Weird cause offsets on Hynix/micron cards worked fine. Never had time to investigate this.
They work for me... oh, mine are Hynix, though.
March 26, 2017, 01:49:40 PM
There is some serious difference in Samsung Modlues, if you're lucky you can have one like i have.
one that easily breaks 34Mh on ETH.. i'm still surprised myself to be honest..
GPU0 - 1220 / 2150
GPU1 - 1180 / 2100
GPU2 - 1220 / 2100
GPU3 - 1220 / 2100
GPU4 - 1220 / 2100
GPU5 - 1220 / 2100
yeah.. strange indeed
one that easily breaks 34Mh on ETH.. i'm still surprised myself to be honest..
GPU0 - 1220 / 2150
GPU1 - 1180 / 2100
GPU2 - 1220 / 2100
GPU3 - 1220 / 2100
GPU4 - 1220 / 2100
GPU5 - 1220 / 2100
yeah.. strange indeed
It's impossible to do >34Mh with a 2150 mem clock. With 2250, maybe, but certainly not at 2150.
March 26, 2017, 01:42:55 PM
Any simple suggestions for a Hynix strap:
999000000000000022559D0010DE5B4480551312B74C450A00400601750414206A8900A00200312 010112D34A42A3816
It's based on the 1625 strap, since the 1500 strap wasn't stable for me beyond 1875. The 1625 is stable at 1950, but slow (barely over 24Mh), and that's after RRD=5, zeroing FAW and 32AW, ACTRD=16. I also dropped tRP from 22 to 21, but that didn't make a difference in speed. From work with other straps, I don't think tightening RAS any more will help. Any quick tips?
999000000000000022559D0010DE5B4480551312B74C450A00400601750414206A8900A00200312 010112D34A42A3816
It's based on the 1625 strap, since the 1500 strap wasn't stable for me beyond 1875. The 1625 is stable at 1950, but slow (barely over 24Mh), and that's after RRD=5, zeroing FAW and 32AW, ACTRD=16. I also dropped tRP from 22 to 21, but that didn't make a difference in speed. From work with other straps, I don't think tightening RAS any more will help. Any quick tips?
March 23, 2017, 06:41:37 PM
I'm trying to make some experiments as well, but so far all failed. Every time I get to desktop after flashing a BIOS with custom straps, I get "Thread stuck in device driver" BSOD in 10-30 secs from OS load. I have Sapphire Nitro RX 480 4 GB with Samsungs, OS is Windows 10 x64. I tried 1625 strap with TRRD 5, 1750 strap with TRRD 5 and 1750 with TFAW/T32AW = 0, all with the same result. I suspect that injecting custom straps into BIOS using Polaris BIOS Editor might be the cause here. Anyone experienced similar problems?
I've been using Polaris BIOS editor, copy the file to my Linux box, and use atiflash. Works like a charm.
You'll be happy to know your comment about a better Eth implementation (a long time ago) not increasing speed if not core-limited was correct. I finally got around to writing something really nice for Polaris (still tweaking it) - and while at low memclocks it does almost nothing, when you bump memclk and drop core for undervolting, it's faster.
March 26, 2017, 01:34:26 PM
I just figured out ohgodadecode has the wrong structure for MISC_TIMING. Here's a Hynix 1625 strap that shows it: 999000000000000022559D0010DE7B4480551312B78C450A004C0601750414206A8900A00200312 018112D34A42A3816
Here's how I think it should be:
I think the way it was defined is probably correct for R9 series cards, not Rx.
Here's the correct structure, it was stated earlier in niko2004x's post.Here's how I think it should be:
Code:
typedef struct _SEQ_MISC_TIMING_FORMAT
{
uint32_t TRP_WRA : 7;
uint32_t TRP_RDA : 7;
uint32_t TRP : 6;
uint32_t TRFC : 9;
uint32_t Pad0 : 3;
} SEQ_MISC_TIMING_FORMAT;
I think the way it was defined is probably correct for R9 series cards, not Rx.
RX
Quote
struct {
uint32_t trp_wra : 7 ;
uint32_t trp_rda : 6 ;
uint32_t m1Pad0 : 1 ;
uint32_t trp : 5 ;
uint32_t m1Pad1 : 1 ;
uint32_t trfc : 9 ;
uint32_t m1Pad2 : 3 ;
} mc_seq_misc_timing;
uint32_t trp_wra : 7 ;
uint32_t trp_rda : 6 ;
uint32_t m1Pad0 : 1 ;
uint32_t trp : 5 ;
uint32_t m1Pad1 : 1 ;
uint32_t trfc : 9 ;
uint32_t m1Pad2 : 3 ;
} mc_seq_misc_timing;
R9
Quote
struct {
uint32_t trp_wra : 6 ;
uint32_t m1Pad0 : 2 ;
uint32_t trp_rda : 6 ;
uint32_t m1Pad1 : 1 ;
uint32_t trp : 5 ;
uint32_t trfc : 9 ;
uint32_t m1Pad2 : 3 ;
} mc_seq_misc_timing;
uint32_t trp_wra : 6 ;
uint32_t m1Pad0 : 2 ;
uint32_t trp_rda : 6 ;
uint32_t m1Pad1 : 1 ;
uint32_t trp : 5 ;
uint32_t trfc : 9 ;
uint32_t m1Pad2 : 3 ;
} mc_seq_misc_timing;
I think mine is better. I think there is really 7 bits for RP_RDA, and 6 for tRP, but none of the existing straps use the highest bit.
March 26, 2017, 01:17:19 PM
My Samsung strap was posted before, but here it is again:
777000000000000022CC1C00CE615C45C0571016B30CD50900400700140514207A8900A00300000 010103139962C3617
With 2100 mclk I'm getting 29-29.1 with sgminer-gm 5.5.5, kernel 4.10.5 & AMDGPU 16.60.
windows driver crash when start ETH, both 2050 and 2100 mem clock.
works good on 2100 clock with 1750 (1625?) strap from original rom
777000000000000022339D00CECD593980551111AE8A84080048C6006C0014206A8900A00200312 0140F262B88252F15
My strap is for K4G4. Likely different mode registers than your 8G Samsung.
thanks for the answer!
Any hint for 8G samsung? My card has no mem cooling so I need some good timings for 2050-2100 range.
There is some serious difference in Samsung Modlues, if you're lucky you can have one like i have.
one that easily breaks 34Mh on ETH.. i'm still surprised myself to be honest..
GPU0 - 1220 / 2150
GPU1 - 1180 / 2100
GPU2 - 1220 / 2100
GPU3 - 1220 / 2100
GPU4 - 1220 / 2100
GPU5 - 1220 / 2100
yeah.. strange indeed
March 26, 2017, 01:02:02 PM
My Samsung strap was posted before, but here it is again:
777000000000000022CC1C00CE615C45C0571016B30CD50900400700140514207A8900A00300000 010103139962C3617
With 2100 mclk I'm getting 29-29.1 with sgminer-gm 5.5.5, kernel 4.10.5 & AMDGPU 16.60.
windows driver crash when start ETH, both 2050 and 2100 mem clock.
works good on 2100 clock with 1750 (1625?) strap from original rom
777000000000000022339D00CECD593980551111AE8A84080048C6006C0014206A8900A00200312 0140F262B88252F15
My strap is for K4G4. Likely different mode registers than your 8G Samsung.
thanks for the answer!
Any hint for 8G samsung? My card has no mem cooling so I need some good timings for 2050-2100 range.
Jump to: