I've experimented quite a bit and found that the most effective way to get extra hashes is just to adjust the asic frequency index:
#if defined(__PRODUCT_MODEL_JALAPENO)
#define __ASIC_FREQUENCY_ACTUAL_INDEX 3 // 180MHz for Jalapeno
#else
#define __ASIC_FREQUENCY_ACTUAL_INDEX 9
#endif
#define __MAXIMUM_FREQUENCY_INDEX 9
Some Jalapenos work better at lower rates, some work optimally at the highest rate. Overall, I've found flashing to be completely safe and impossible to brick your unit (I've tried almost everything). Adjusting the frequency (i.e. 64Mhz) tends to lock up most units or if it actually works, then the unit over-reports its hashing rate, or reports nothing at all.
Initially I had a hard time finding the latest firmware, so I uploaded it to my website server (link below). This includes the original 1.2.5 firmware and a compiled ELF, so if you don't feel like figuring out how to compile it, its there. If there is still interest, I would be happy to compile an ELF to your specs and upload.
http://www.datarecovery.com/BitForce_SC-master.zip
18PHQcyxXnV8mokC7itvKd19SZMjhS3p7M
Topic: Experimenting with Jalapeno firmware... (Read 62632 times)
Anyone managed to flash the Jally using avrdude? My JTAG programmer is only a JTAG-ICE mkI compatible which is not supported in AVR studio later than 4.19 thus ruling out the 32bit chips. avrdude does support it.
I see avrdude already has support for one on the 32UC3A devices in /etc/avrdude.conf
I was thinking of making an entry for the AT32UC3A1256 and seeing if it works, but I don't know the right values to put in. Any suggestions?
Failing that, does anyone know how to get urjtag to talk to an jtagice mk1 clone on /dev/ttyUSB0? Linux can see it no problem, it's using a ch341 driver but I can figure out how to get urjtag to talk to the serial port and think it's a jtag ice.
I see avrdude already has support for one on the 32UC3A devices in /etc/avrdude.conf
Code:
part
id = "ucr2";
desc = "32UC3A0512";
signature = 0xED 0xC0 0x3F;
has_jtag = yes;
is_avr32 = yes;
memory "flash"
paged = yes;
page_size = 512; # bytes
readsize = 512; # bytes
num_pages = 1024; # could be set dynamicly
size = 0x00080000; # could be set dynamicly
offset = 0x80000000;
;
id = "ucr2";
desc = "32UC3A0512";
signature = 0xED 0xC0 0x3F;
has_jtag = yes;
is_avr32 = yes;
memory "flash"
paged = yes;
page_size = 512; # bytes
readsize = 512; # bytes
num_pages = 1024; # could be set dynamicly
size = 0x00080000; # could be set dynamicly
offset = 0x80000000;
;
I was thinking of making an entry for the AT32UC3A1256 and seeing if it works, but I don't know the right values to put in. Any suggestions?
Failing that, does anyone know how to get urjtag to talk to an jtagice mk1 clone on /dev/ttyUSB0? Linux can see it no problem, it's using a ch341 driver but I can figure out how to get urjtag to talk to the serial port and think it's a jtag ice.
My older jally had older chips but 256mb ATMel so I was able to do 1.2.9. Are the 128mb chip and the 256mb chip interchangable? i.e. Is it a simple swap on an older unit to get it to use new chips?
In other news, there is a guy in the marketplace trying to offload 300 BFL chips. I PM'ed him but no response so far:
https://bitcointalksearch.org/topic/sold-300-x-bfl-65nm-chips-in-hand-accepting-offers-escrow-ok-pm-342529
In other news, there is a guy in the marketplace trying to offload 300 BFL chips. I PM'ed him but no response so far:
https://bitcointalksearch.org/topic/sold-300-x-bfl-65nm-chips-in-hand-accepting-offers-escrow-ok-pm-342529
No, there is a tool at the BFL forums called Handy Dandy BFL Commport something or other. It can query the jally and tell you everything.
Something I discovered though: 128mb ATMel chips in older jallies cannot run 1.2.9 software. Which means they can't take the later chips as those require 1.2.9. So if you flash a 128mb jally with 1.2.9 you get a perfect brick. Reflash with 1.2.5 and all will be well again.
C
Something I discovered though: 128mb ATMel chips in older jallies cannot run 1.2.9 software. Which means they can't take the later chips as those require 1.2.9. So if you flash a 128mb jally with 1.2.9 you get a perfect brick. Reflash with 1.2.5 and all will be well again.
C
How does one determine the firmware version in a Jalapeno? Do you need a JTAG device?
--E
--E
Where to do you live lightfoot? If you're close, it's a road trip with my jally, bfl chips and lots of beer! lol
East Coast, bit far from you but I wouldn't mind a party sometime.... I can't seem to find the area where you can hardcode the frequency to set number, IE my jallys get up to 266 and 274 on each one. I would like to get them up to like 280 and see what happens from there and tune as needed.
Thanks for all the rest of the info!
With reference to the firmware 1.2.6, ASIC_Engine.c line 1580, where you can see it is trying to set the frenquency. I tried changing the iFreqFactor to 350000000 but it gives me alot of HW error...
Note that it will not change the GetInfo details of the chips... because the details are calculated in another method...
Regards
I tried this, wanted to repeat it, changing iFreqFactor to 350000000 but nothing seems to be different, did not get a lot of HW errors, ElitePork do you just change the 1 line?
Where to do you live lightfoot? If you're close, it's a road trip with my jally, bfl chips and lots of beer! lol
Sweet. That's a pretty good set; I could not get more than 13 cores running on one chip. Enjoy the extra gh.
C
C
I loaded a bin file from a hex file I found somewhere by 'mrrad'
when I scanned the device it appears that it is a 'ck' according to the firmware line? Looks like I got all 30 horses out of the barn with this one.
after flashing BitForce.SC-mrrad.1.2.5 (ck?)
=====================================
[ID] => BAJ0
[GetInfo] => DEVICE: BitFORCE SC0x0a
FIRMWARE: 1.2.5ck0x0aIAR
Executed: NO0x0a
CHIP PARALLELIZATION: YES @ 20x0a
QUEUE DEPTH:400x0a
PROCESSOR 3: 15 engines @ 248 MHz -- MAP: FFFE0x0a
PROCESSOR 7: 15 engines @ 279 MHz -- MAP: FFFE0x0a
THEORETICAL MAX: 7905 MH/s0x0a
ENGINES: 300x0a
FREQUENCY: 274 MHz0x0aX
LINK MODE: MASTER0x0a
CRITICAL TEMPERATURE: 00x0aX
LINK PRESENT: NO0x0aOK0x0a0x00
I'll let it run.....
thanks 2 lightfoot, ck, and mrrad!
when I scanned the device it appears that it is a 'ck' according to the firmware line? Looks like I got all 30 horses out of the barn with this one.
after flashing BitForce.SC-mrrad.1.2.5 (ck?)
=====================================
[ID] => BAJ0
[GetInfo] => DEVICE: BitFORCE SC0x0a
FIRMWARE: 1.2.5ck0x0aIAR
Executed: NO0x0a
CHIP PARALLELIZATION: YES @ 20x0a
QUEUE DEPTH:400x0a
PROCESSOR 3: 15 engines @ 248 MHz -- MAP: FFFE0x0a
PROCESSOR 7: 15 engines @ 279 MHz -- MAP: FFFE0x0a
THEORETICAL MAX: 7905 MH/s0x0a
ENGINES: 300x0a
FREQUENCY: 274 MHz0x0aX
LINK MODE: MASTER0x0a
CRITICAL TEMPERATURE: 00x0aX
LINK PRESENT: NO0x0aOK0x0a0x00
I'll let it run.....
thanks 2 lightfoot, ck, and mrrad! Yes I did find the file but...I dont have a Dragon, I have been loading the files by converting Hex files to bin and loading the bin file with a Raspberry Pi. Is there a workaround to get this into bin format?
Is the file the zipped up .elf file? Is that for the Dragon?
It was a zip file with the elf. You load the elf on the Jally with Atmel studios through a Dragon or appropriate JTAG programmer.The person who made a great 1.2.5 elf is ckolivas
C
That's a great error rate. I think I am doing about 20% right now with the pre rolled gentrakin bin sc_7_1.29 firmware. At least I am up from the stock 4600mhz w/ 6% errors to 5740mhz despite the 20% erros BFG shows.
Hm. Should go a bit higher than that. Try CK's 1.2.5 pre-roll; it's further back in this thread. Tarkin's is nice but the problem is he turns off error checking on the cores, and since our cores have more errors, you wind up with dead cores being submitted as work which slows down and wastes power.
Quote
I have seen your posts on how to add chips to the Jalapeno. Quite impressive. It got me reading up on Hot Air reflow and soldering stations. Some great deals to be had on ebay and amazon for sure for some neat kit. I even watched some videos on youtube and remove and soldering chips doesnt seem that hard (with a little practice). But what you were doing to install the BFL chip with the hot plate seems a little outta my league. I think there is a strong likely hood of me toasting my board or mis-aliging the chip if I tried that. Nice job none the less.
Going to 4-5 was not a problem, however I seem to have stalled. Either the last two chips I got were duds or something really went weird. I'll see if I can get another chip to try a different tack.
Try Ck's elf.
C
Is the file the zipped up .elf file? Is that for the Dragon?
That's a great error rate. I think I am doing about 20% right now with the pre rolled gentrakin bin sc_7_1.29 firmware. At least I am up from the stock 4600mhz w/ 6% errors to 5740mhz despite the 20% erros BFG shows.
Hm. Should go a bit higher than that. Try CK's 1.2.5 pre-roll; it's further back in this thread. Tarkin's is nice but the problem is he turns off error checking on the cores, and since our cores have more errors, you wind up with dead cores being submitted as work which slows down and wastes power.
Quote
I have seen your posts on how to add chips to the Jalapeno. Quite impressive. It got me reading up on Hot Air reflow and soldering stations. Some great deals to be had on ebay and amazon for sure for some neat kit. I even watched some videos on youtube and remove and soldering chips doesnt seem that hard (with a little practice). But what you were doing to install the BFL chip with the hot plate seems a little outta my league. I think there is a strong likely hood of me toasting my board or mis-aliging the chip if I tried that. Nice job none the less.
Going to 4-5 was not a problem, however I seem to have stalled. Either the last two chips I got were duds or something really went weird. I'll see if I can get another chip to try a different tack.
Try Ck's elf.
C
That's a great error rate. I think I am doing about 20% right now with the pre rolled gentrakin bin sc_7_1.29 firmware. At least I am up from the stock 4600mhz w/ 6% errors to 5740mhz despite the 20% erros BFG shows.
It's running about 40-41c. Do you think it's ok to run with such a high error rate?
I have seen your posts on how to add chips to the Jalapeno. Quite impressive. It got me reading up on Hot Air reflow and soldering stations. Some great deals to be had on ebay and amazon for sure for some neat kit. I even watched some videos on youtube and remove and soldering chips doesnt seem that hard (with a little practice). But what you were doing to install the BFL chip with the hot plate seems a little outta my league. I think there is a strong likely hood of me toasting my board or mis-aliging the chip if I tried that. Nice job none the less.
I would be interested in trying ck's 1.25 , but I imagine I need to find a windows box to run atmel studio? Is it pretty much ready to compile asside from needing to set __ASIC_FREQUENCY_ACTUAL_INDEX to 7 ?
It's running about 40-41c. Do you think it's ok to run with such a high error rate?
I have seen your posts on how to add chips to the Jalapeno. Quite impressive. It got me reading up on Hot Air reflow and soldering stations. Some great deals to be had on ebay and amazon for sure for some neat kit. I even watched some videos on youtube and remove and soldering chips doesnt seem that hard (with a little practice). But what you were doing to install the BFL chip with the hot plate seems a little outta my league. I think there is a strong likely hood of me toasting my board or mis-aliging the chip if I tried that. Nice job none the less.
I would be interested in trying ck's 1.25 , but I imagine I need to find a windows box to run atmel studio? Is it pretty much ready to compile asside from needing to set __ASIC_FREQUENCY_ACTUAL_INDEX to 7 ?
Nicely done. Try bringing the speed down to 7, you will probably get rid of most of the errors. For 2 cpus the errors aren't that big of a deal, but it's wasted heat.
Or mine for awhile, I was able to run 7.3-7.4gh on mine before boosting it to 20.
C
Or mine for awhile, I was able to run 7.3-7.4gh on mine before boosting it to 20.
C
How do I adjust the speed to 7? Go back to the SC_7 pre-complied b, in on that page i linked to? Or is there a way to pass it commands?
__ASIC_FREQUENCY_ACTUAL_INDEX 7
Actually ck's 1.2.5 firmware is my favorite. Right balance of tests and performance, got me 7.3gh on my jally.
C
When you say 7.3gh does that mean actual effective rate after errors? ie are you getting that in the pool?
I'm pulling between 19 and 20. Wish I could go higher. Drat.
Nicely done. Try bringing the speed down to 7, you will probably get rid of most of the errors. For 2 cpus the errors aren't that big of a deal, but it's wasted heat.
Or mine for awhile, I was able to run 7.3-7.4gh on mine before boosting it to 20.
C
Or mine for awhile, I was able to run 7.3-7.4gh on mine before boosting it to 20.
C
How do I adjust the speed to 7? Go back to the SC_7 pre-complied b, in on that page i linked to? Or is there a way to pass it commands?
__ASIC_FREQUENCY_ACTUAL_INDEX 7
Actually ck's 1.2.5 firmware is my favorite. Right balance of tests and performance, got me 7.3gh on my jally.
C
When you say 7.3gh does that mean actual effective rate after errors? ie are you getting that in the pool?
Nicely done. Try bringing the speed down to 7, you will probably get rid of most of the errors. For 2 cpus the errors aren't that big of a deal, but it's wasted heat.
Or mine for awhile, I was able to run 7.3-7.4gh on mine before boosting it to 20.
C
Or mine for awhile, I was able to run 7.3-7.4gh on mine before boosting it to 20.
C
How do I adjust the speed to 7? Go back to the SC_7 pre-complied b, in on that page i linked to? Or is there a way to pass it commands?
__ASIC_FREQUENCY_ACTUAL_INDEX 7
Actually ck's 1.2.5 firmware is my favorite. Right balance of tests and performance, got me 7.3gh on my jally.
C
since the thread is long and messy. what are current finds - how fast can it run now max?
depends on the chips.. so luck of the draw.
theoretical max is near 9 ghs with a stock jally.
best so far seems to be 8.5 or so (with a stock 2 chip jally).
cks firmware is solid.
Nicely done. Try bringing the speed down to 7, you will probably get rid of most of the errors. For 2 cpus the errors aren't that big of a deal, but it's wasted heat.
Or mine for awhile, I was able to run 7.3-7.4gh on mine before boosting it to 20.
C
Or mine for awhile, I was able to run 7.3-7.4gh on mine before boosting it to 20.
C
How do I adjust the speed to 7? Go back to the SC_7 pre-complied bin on that page i linked to? Or is there a way to pass it commands?
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