I've just received my Icarus including DEV kit! Very well packed!
It took around 10 mints to unpack, setup, and start mining!
Thank you Zhang!
Topic: FPGA development board "Icarus" - DisContinued/ important announcement - page 33. (Read 207285 times)
January 31, 2012, 06:38:14 PM
January 31, 2012, 06:22:06 PM
You're probably trying to open the PDF link with "Save Link as". That won't work on gitHub because it sends an html page (probably 25k size). You need to open the PDF page and use the "Save Link as" option on the "View Raw File" link they provide.
That link will save the actual pdf file.
That link will save the actual pdf file.
Yes, you are correct. Got it now. [bangs head against wall]
January 31, 2012, 06:17:31 PM
You're probably trying to open the PDF link with "Save Link as". That won't work on gitHub because it sends an html page (probably 25k size). You need to open the PDF page and use the "Save Link as" option on the "View Raw File" link they provide.
That link will save the actual pdf file.
That link will save the actual pdf file.
January 31, 2012, 06:14:48 PM
2 weeks after that. 
ADD:
sorry guys. i just found a serious mistake in the code. it result in unstable. i will fix this issue in 1 week.
ADD:
sorry guys. i just found a serious mistake in the code. it result in unstable. i will fix this issue in 1 week.
Hi, I was trying to look at your PDF schematic, but Adobe reader says it's damaged or incomplete. Can you please double-check that? Thanks!
it's ok here, how about change to another version of pdf reader?
I can assure you, my Adobe Acrobat 10.1.2 is fine - and I tried this on multiple computers.
When downloaded from github, the file Icarus_V1.pdf has a length of only 25474 bytes, not enough for a schematic.
Can you attach it to a PM? Is that possible? Or upload it somewhere else?
I am able to open it in Adobe Reader 9.4.6 under Ubuntu.
January 31, 2012, 01:11:51 PM
2 weeks after that.
ADD:
sorry guys. i just found a serious mistake in the code. it result in unstable. i will fix this issue in 1 week.
ADD:
sorry guys. i just found a serious mistake in the code. it result in unstable. i will fix this issue in 1 week.
Hi, I was trying to look at your PDF schematic, but Adobe reader says it's damaged or incomplete. Can you please double-check that? Thanks!
it's ok here, how about change to another version of pdf reader?
I can assure you, my Adobe Acrobat 10.1.2 is fine - and I tried this on multiple computers.
When downloaded from github, the file Icarus_V1.pdf has a length of only 25474 bytes, not enough for a schematic.
Can you attach it to a PM? Is that possible? Or upload it somewhere else?
it's: 1115.404 kb size.
or give me an email, and i will attach it for you.
January 31, 2012, 01:03:30 PM
2 weeks after that.
ADD:
sorry guys. i just found a serious mistake in the code. it result in unstable. i will fix this issue in 1 week.
ADD:
sorry guys. i just found a serious mistake in the code. it result in unstable. i will fix this issue in 1 week.
Hi, I was trying to look at your PDF schematic, but Adobe reader says it's damaged or incomplete. Can you please double-check that? Thanks!
it's ok here, how about change to another version of pdf reader?
I can assure you, my Adobe Acrobat 10.1.2 is fine - and I tried this on multiple computers.
When downloaded from github, the file Icarus_V1.pdf has a length of only 25474 bytes, not enough for a schematic.
Can you attach it to a PM? Is that possible? Or upload it somewhere else?
January 31, 2012, 01:11:04 AM
2 weeks after that.
ADD:
sorry guys. i just found a serious mistake in the code. it result in unstable. i will fix this issue in 1 week.
ADD:
sorry guys. i just found a serious mistake in the code. it result in unstable. i will fix this issue in 1 week.
Will the batch 3 boards run at a higher clockrate?
hard to say now, but possible -- if the FPGAs maintain a good quality as first and second batch's.
but a certain frequency only can be decided after the manufacture.
January 31, 2012, 12:56:27 AM
2 weeks after that.
ADD:
sorry guys. i just found a serious mistake in the code. it result in unstable. i will fix this issue in 1 week.
ADD:
sorry guys. i just found a serious mistake in the code. it result in unstable. i will fix this issue in 1 week.
Will the batch 3 boards run at a higher clockrate?
January 30, 2012, 11:48:33 PM
2 weeks after that.
ADD:
sorry guys. i just found a serious mistake in the code. it result in unstable. i will fix this issue in 1 week.
ADD:
sorry guys. i just found a serious mistake in the code. it result in unstable. i will fix this issue in 1 week.
Hi, I was trying to look at your PDF schematic, but Adobe reader says it's damaged or incomplete. Can you please double-check that? Thanks!
it's ok here, how about change to another version of pdf reader?
January 30, 2012, 08:26:04 PM
2 weeks after that.
ADD:
sorry guys. i just found a serious mistake in the code. it result in unstable. i will fix this issue in 1 week.
ADD:
sorry guys. i just found a serious mistake in the code. it result in unstable. i will fix this issue in 1 week.
Hi, I was trying to look at your PDF schematic, but Adobe reader says it's damaged or incomplete. Can you please double-check that? Thanks!
January 30, 2012, 01:31:13 AM
2 weeks after that.
ADD:
sorry guys. i just found a serious mistake in the code. it result in unstable. i will fix this issue in 1 week.
ADD:
sorry guys. i just found a serious mistake in the code. it result in unstable. i will fix this issue in 1 week.
January 30, 2012, 12:46:40 AM
unfortunately , i haven't any boards left in my hand. it looks like an sample is needed for the software development.and now china is in a huge new year holiday, every factory closed for half month.... until Feb.1
Is that when we can expect Batch 3 to go out..or two weeks after that?
January 29, 2012, 05:23:29 PM
Im currently trying to make the miner run on my ARM plattform.
Im using a ubuntu 11.04 port with the LXDE desktop.
Altough i have determined the USB port of the Icarus board as usbdev2.8
i get the following serial error
Im using a ubuntu 11.04 port with the LXDE desktop.
Altough i have determined the USB port of the Icarus board as usbdev2.8
i get the following serial error
Code:
gumstix@Gumstix:~/Desktop/Icarus/miner_software/simple_ver$ sudo python miner.py -u http//O_Shovah_Icarus_1:[email protected]:8337 -s /dev/usbdev2.8
Traceback (most recent call last):
File "miner.py", line 180, in
ser = Serial(options.serial_port, 115200, timeout=options.askrate)
File "/usr/lib/python2.7/dist-packages/serial/serialutil.py", line 260, in __init__
self.open()
File "/usr/lib/python2.7/dist-packages/serial/serialposix.py", line 280, in open
self._reconfigurePort()
File "/usr/lib/python2.7/dist-packages/serial/serialposix.py", line 308, in _reconfigurePort
raise SerialException("Could not configure port: %s" % msg)
serial.serialutil.SerialException: Could not configure port: (25, 'Inappropriate ioctl for device')
January 29, 2012, 04:29:43 PM
I added the Icarus board to my FPGA part of the mining comparison wiki.
https://en.bitcoin.it/wiki/Mining_hardware_comparison#FPGA_Devices
please check and update if needed.
https://en.bitcoin.it/wiki/Mining_hardware_comparison#FPGA_Devices
please check and update if needed.
notice that clock is 190MHz, and the FPGA is : XC6SLX150-2FGG484I
January 29, 2012, 12:20:54 PM
unfortunately , i haven't any boards left in my hand. it looks like an sample is needed for the software development.and now china is in a huge new year holiday, every factory closed for half month.... until Feb.1
January 29, 2012, 12:09:38 PM
January 29, 2012, 09:04:18 AM
I added the Icarus board to my FPGA part of the mining comparison wiki.
https://en.bitcoin.it/wiki/Mining_hardware_comparison#FPGA_Devices
please check and update if needed.
https://en.bitcoin.it/wiki/Mining_hardware_comparison#FPGA_Devices
please check and update if needed.
notice that clock is 190MHz, and the FPGA is : XC6SLX150-2FGG484I
January 29, 2012, 06:05:19 AM
I added the Icarus board to my FPGA part of the mining comparison wiki.
https://en.bitcoin.it/wiki/Mining_hardware_comparison#FPGA_Devices
please check and update if needed.
https://en.bitcoin.it/wiki/Mining_hardware_comparison#FPGA_Devices
please check and update if needed.
January 28, 2012, 11:33:10 PM
about the measurement of V2 or 200M or futuer ver:
i suggest this way: i think the LX150 fpgas will never met 250M speed, so set the timeout to 8.5S will suit for any version of bitsteams.
about the LEDs:
PWR_OK: power modules output are all in good voltage.
TXD1 and RXD1: for display transport on the USB UART bridge, but by a design miss, they are difficult to discriminate, and this function is also implemented on other LEDs, so will be removed in the future.
LED1: FPGA1 is busy, in the origin bitsteam, light means FPGA is working, but it changed to opposite.
LED2: TXD for FPGA1
LED3: RXD for FPGA1
LED4: valid nonce found by FPGA1. will light and fade out in 4 seconds.
LED5: FPGA2 is busy.
LED6: TXD for FPGA2
LED7: RXD for FPGA2
LED8: valid nonce found by FPGA2.
i suggest this way: i think the LX150 fpgas will never met 250M speed, so set the timeout to 8.5S will suit for any version of bitsteams.
about the LEDs:
PWR_OK: power modules output are all in good voltage.
TXD1 and RXD1: for display transport on the USB UART bridge, but by a design miss, they are difficult to discriminate, and this function is also implemented on other LEDs, so will be removed in the future.
LED1: FPGA1 is busy, in the origin bitsteam, light means FPGA is working, but it changed to opposite.
LED2: TXD for FPGA1
LED3: RXD for FPGA1
LED4: valid nonce found by FPGA1. will light and fade out in 4 seconds.
LED5: FPGA2 is busy.
LED6: TXD for FPGA2
LED7: RXD for FPGA2
LED8: valid nonce found by FPGA2.
January 28, 2012, 12:47:49 PM
Is there any description of the LED signals ?
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