Topic: Klondike - 16 chip ASIC Open Source Board - Preliminary - page 176. (Read 435369 times)

This being said, I have seen QFN-48 clamshell chip carriers around with thick gold plated slugs for the center pad. Since Avalon sample chips are coming earlier than the full batches, would it be helpful to make a, say, 2- or 4-avalon board with all the necessary hardware (interface uC, smaller version of power supply) to test/debug software on? I'd imagine you could get at least 20-30 seconds of full speed hashing before thermal issues arose (whereas with an unmounted chip I wouldn't trust it hashing for more than 2-3 seconds). That way you could finalize your design with higher confidence, and possibly have near-complete boards ready and waiting when the full Avalon batches show up.

http://www.mouser.com/ProductDetail/3M-Electronic-Solutions-Division/288-4205-01/?qs=sGAEpiMZZMsF5fZXKZXt6HnXba9GH55j3eF08QDY59M%3d

It'd probably cost you about $1000 to develop this prototype/debug platform.

I'd be willing to lead the PCB design on this. My code writing is kinda weak, but how hard could it be to pass some data from usb/cgminer to I2C/SPI/UART? Anyway, I'm sure someone like BKKcoins would be willing to help =)

Shiny

+1

crap, did I just give away that i'm lurking here? 

Your time would be much better served trying to buy BTC cheap then, since it's the majority of the cost.

what i mean is it's not worth trying to penny pinch, time is the #1 most important factor here, I would say design a PCB Assembly that you know will work (over engineer it where possible) and test it as throughally as possible prior to the actual chips arriving.  And these will be running for a long time, 24/7.

sort of like shipping costs, do you pay 4$ rush shipping for a 10$ product?  Do you pay 4$ rush shipping for a 5,000$ product?

also what is far more important is heat dissipation.

4.8 GH clocked at 300MHz. 

Why not? I'm not saying the board design should prioritize price over quality, but there's also no point in spending more money than what is needed. 10 cents saved on a $150 purchase has the same value as 10 cents saved on a $1 purchase.

Those prices do not include, at the least

*Heatsinks
*Fans
*The actual work of putting it together (if you go to a normal assembly house with only a few boards this could be damn expensive)
*Shipping & Handling
*Taxes
*Import Tarrifs

hi bkk

so you mean total cost for a pcb with 16 chips will be less than 200 usd?

chip included and speed will 275x16=4.4 gigahash/sec?

Assuming 8$/Avalon ASIC chip (1 BTC = 100$)



so yeah - saving a few cents here and there won't really matter.

Sure, you can fork away (once I put the files up). One primary reason I switched over to Kicad was that it's open source and anyone can grab it and work on their own version. I would have stuck with Eagle for 2 layers as it's more well known. Kicad has it's oddities though and a number of things I've already ran into that I can't figure what they were thinking.

I think you could easily adjust the core voltage with some sort of programmable resistor on the buck reg. Not sure if such a thing is readily available but it should be. You could probably use a few FETs shorting out a binary series of resistor values to adjust the voltage divider.

eDiT: Oh geez, here you go...

http://ww1.microchip.com/downloads/en/DeviceDoc/22107a.pdf
(Now that I think about it you could probably use an analog output from the PIC as control voltage on the regulator but that would take some digging into to figure out)

I believe the ASIC has a PLL on board that multiplies 32 MHz up to values between 256 and 300. The cgminer driver has the code that sends two bytes for each hash speed. I documented the values further up this thread.

Do the Avalon chips have the ability to adjust clock frequency / core voltage / etc?

I may make a fork(does that make sense for hardware?) of the board that adds the ability to do that.

It wouldn't be needed for a standard board but it'd be interesting to add

* Thermal sensors near each ASIC or heatsink that feed back over USB.
* Ability to adjust core voltage (probably by hand)
* Ability to adjust frequency (maybe digitally with a DDS, - really need the Avalon design docs to figure the best way to do this)

Edit : We will need to make sure the decoupling and board step down regulator is capable of driving 16 chips.  it looks like the standard avalon board only runs 10 chips per VRM.  Just really need the documentation from Avalon

When you add an SMT capacitor to a circuit, what you're really adding is a series RLC circuit.  R for the ESR of the capacitor and the traces, L for the parasitic inductance of the capacitor and the traces, and the C you actually want

If you look at it on a network analyzer you'll see indeed the impedance has a minimum at a given frequency based on the ESL and Capacitance.

You can add more capacitance but you will shift this frequency lower, and the minimum impedance will increase somewhat.

Generally start with one say, 0.1uF capacitance, and if it doesn't work, try changing the value lower or higher (depending on the frequency you need decoupling at) - once that is ideal, the best thing to do is add more of the exact same value capacitor in parallel.  this increases the capacitance but also DECREASES the paraistic inductance, so it gets BETTER and has more decoupling capacitance.

note : People used to add say, 0.1uF, 10nF, 100pF caps in parallel because in theory this would give a wide range of decoupling

the problem is it produces anti-resonance where the coupling gets worse.  it's a very, very tricky thing to try and fine tune, and should be avoided in 95% of cases.

my suggestion - put pads for lots of 0603 0.1uF capacitances, but only populate the reference PCB amount.  if you need more or have to tweak, the pads are right there for it.  It's standard practice to have pads for parts you don't actually populate going into production.

At this point I'm assuming the Avalon guys know what works. Usually you can't put in one big cap instead of many small ones because of frequency response. Essentially a big cap won't filter high frequency noise but the small ones will, and the bit twiddling is high frequency noise (one bit interferes with another bit).

Cool. Yes, upload it to imgur.com and paste the image or link here.

70% of those parts are decoupling caps for the ASICs. Is it really necessary to have 14 per ASIC? As a back-of-the-envelope calculation, I get about 5 nC of charge per clock cycle (based on 1.5 A @ 282 MHz). With 0.8 uF of lumped capacitance, neglecting ESR/ESL, that's about a 7 mV drop, which is small. Maybe you can get away with less? Maybe you can use larger capacitance values but fewer caps overall?

I suppose the only way to know is to do some in-circuit testing on actual ASICs.

Pretty much place holders for now - I'll just use the same values as the Avalon when the docs come out. There are 8 per ASIC for 1.2V supply, and 6 per ASIC for 3.3V supply ( 3 each, 2 values ).

There are so many for the 1.2V supply because of the nature of hashing circuits. You can get random switching of a large number of bits at once creating current spikes. These caps provide ready current close at hand so that bit errors don't result, and they decouple these spikes (noise) from affecting other ASICs on board.

played around with the BOM for about 5 minutes


Assuming BTC = 100$ and you buy chips at 0.08BTC/chip (aka 8$/chip)

Power Inductors   $3.53
Caps   $10.621
Resistors   $1.61
Connectors   $1.43
Regulators   $8.75
Avalon ASIC chip   $128.00
4 Layer PCB   $5.00
Misc electronics   $4.14

Avalon is 78% the cost of the PCB assembly with 16x of them

but this is of course without the heatsink/fan/etc

and that is very cheap for a 4 layer board.. very, very cheap.  For many it will be more.

I have a nice piechart.  can you not upload images here?

ah, ok, started counting on the avalon board, there are quite a lot of caps there also.

Probably power supply decoupling on the VCC pins for the 0.1uF (8 per QFN), and possibly for the data lines for the 0.01uF (6 per QFN)

sometimes people parallel multiple capacitors with different values (e.g. 100nF, 10nF, 1nF) but the practice is.. controversial.  That doesn't appear to be the case here though since it's only 6 per QFN instead of 8 for the 0.01uF

What are all those caps for?, 128 + 96?
(No schematic there yet to peruse.. )

Yes, I already have that rig, so if you first are designing the boards, the holes shouldn't hurt anyone
(not having the toaster yet though.. considering this model: http://dangerousprototypes.com/2013/02/14/workshop-video-55-infrared-reflow-oven-qinsi-qs-5100/  )

The dudes at Dangerousprototypes did buy an cheap picknplace:
http://dangerousprototypes.com/2013/02/21/workshop-video-56-tm220a-table-top-pick-and-place-overview/

Or you have the el cheapo:
http://dangerousprototypes.com/2013/02/01/dual-headed-component-pickup-vacuum-pen/