3 vote now , can we buy shares immediately when reach the 5 vote ?
No. The issuer has to unlock the security to allow trading to begin once the 5 votes have been made and they've said that they'll give 16-24 hours notice once that happens.
Topic: [LABCOIN] IPO [BTCT.CO] - Details/FAQ and Discussion (ASIC dev/sales/mining) - page 907. (Read 1079974 times)
July 31, 2013, 12:31:09 AM
No. The issuer has to unlock the security to allow trading to begin once the 5 votes have been made and they've said that they'll give 16-24 hours notice once that happens.
July 31, 2013, 12:31:04 AM
They said they'd give a 16-24h window for people to get things setup to participate in the IPO.
Interesting... I'd like to see more competition besides huge companies spending millions on 28nm chips.
5 vote now.
Interesting... I'd like to see more competition besides huge companies spending millions on 28nm chips.
July 31, 2013, 12:30:44 AM
5 vote now.
July 31, 2013, 12:27:40 AM
3 vote now , can we buy shares immediately when reach the 5 vote ?
four now. woh woh woh. July 31, 2013, 12:07:52 AM
I am not sure I am the person to do so, but from everything I have discussed with the team Labcoin is ready for first run as soon as the funds are available for running it. This is also the case for volume production. One of the main factors behind the lower density choice (130nm) for first generation chips is the time-to-market advantage that production availability gives. (There is plenty of availability for 130 nm production, while 28 nm and even 65 nm production has long booking times and few shuttles at far fewer foundries).
KnC and HashFast seem to have gotten really good access, probably through their partnerships with Uniquify and ORSoC
July 31, 2013, 12:05:10 AM
3 vote now , can we buy shares immediately when reach the 5 vote ?
+1 July 30, 2013, 11:55:23 PM
3 vote now , can we buy shares immediately when reach the 5 vote ?
July 30, 2013, 11:31:02 PM
Vbs' point was that your proposed time advantage in relation to actm's timeline for hardware release doesn't exist or is exaggerated.
Feel free to correct him.
Feel free to correct him.
I am not sure I am the person to do so, but from everything I have discussed with the team Labcoin is ready for first run as soon as the funds are available for running it. This is also the case for volume production. One of the main factors behind the lower density choice (130nm) for first generation chips is the time-to-market advantage that production availability gives. (There is plenty of availability for 130 nm production, while 28 nm and even 65 nm production has long booking times and few shuttles at far fewer foundries).
July 30, 2013, 11:26:49 PM
Vbs' point was that your proposed time advantage in relation to actm's timeline for hardware release doesn't exist or is exaggerated.
Feel free to correct him.
Feel free to correct him.
July 30, 2013, 11:21:16 PM
When can officially buy stocks?
It depends on how soon the stock get approval. Labcoin has no control with that. So just keep an eye on BTCT voting
July 30, 2013, 11:16:04 PM
When can officially buy stocks?
It depends on how soon the stock get approval. Labcoin has no control with that. So just keep an eye on BTCT voting
July 30, 2013, 11:09:09 PM
Since I am not a chip designer or engineer I think maybe it's best that I pass the engineering questions to our developers. I will have someone from the development team take over the hardware specifics here and stick to business plans and IPO specifics before I end up saying something wrong.
July 30, 2013, 10:57:15 PM
ACTM wait up to six months. . LOL. . . Time is money
You should pay more attention to the small details then!
http://labcoin.com/docs/2.jpg
May I ask what your point is? This is the TSMC customer contract for our chip development estimates pre-IPO.
July 30, 2013, 10:52:17 PM
When can officially buy stocks?
July 30, 2013, 10:44:46 PM
A 130nm chip at 4.5-5GH/s with that power draw? 
So, an 110nm avalon chip is 282MH/s, but you guys somehow can create a chip with bigger transistors (130nm) that is equivalent to 16-17 avalon chips?
Not only that, but you claim you've optimized the logic so much that any competing chips using similar die-sizes are left in the dust?
Size of chip die area? Operating frequency? Number of cores?
Sorry, too many red flags in the key technical aspects.
So, an 110nm avalon chip is 282MH/s, but you guys somehow can create a chip with bigger transistors (130nm) that is equivalent to 16-17 avalon chips?
Not only that, but you claim you've optimized the logic so much that any competing chips using similar die-sizes are left in the dust?
Size of chip die area? Operating frequency? Number of cores?
Sorry, too many red flags in the key technical aspects.
According to the preliminary specs (https://bitcointalksearch.org/topic/m.2664903) this chip should perform better than the BFL ASIC (65 nm) while occupying even smaller silicon area. I'm a total noob when it comes to chip designing, so can't even guess if it's possible. Any idea?
BFL - 65 nm, 16 cores, 250 MH/s each, 4 GH/s total, die size 7.1 x 7.1 mm, 12.8 W total
Labcoin - 130 nm, 16 cores, 300 MH/s each, 4.8 GH/s total, die size 6.5 x 6.5 mm, 12.8 W total
By no means I don't want to make any hints to the BFL performance as a company. On the contrary, the labcoin chip has enormous potential if everything goes well.
If those are the correct specs, then I'm sorry but... LOL!!!
For that to be possible, not only each Labcoin core would have to be ~42% smaller [65/130*(6.5^2)/(7.1^2)] than each BFL core but also the Labcoin chip would magically operate at a higher frequency (300MHz vs 250MHz) while keeping the same power draw...
Since there are several new companies going for the 130nm route with the excuse that manufacturing costs are much cheaper, might as well burst that bubble too: It's not. Nothing beats going 28nm now, except for the fact that the upfront NRE cost is much higher.
It is of course up to all investors to draw their own conclusions and believe what they want regarding what density (130, 110, 65, 55 or 28 nm) deliver the best ROI over time.
labcoin has made the choice to go with 130 nm as gen 1 and 65 nm as gen 2 for several reasons. Some of these reasons are NRE costs, fabrication costs, available developer resources, capital procurement and availability of Foundry shuttles and production slots.
We are certainly not claiming that 28 nm is a "bad choice" by default, but for a smaller project not wanting to be forced to raise millions of dollars and bet "everything" on a single development project or risk total failure (Bitfury did this, and it seems they were lucky enough to actually come out with positive results). Then staying with lesser density that is cheaper and offer far more flexible production options just makes sense.
Maybe worth pointing out that the graph you pasted has almost no relation to ANY ASIC manufacturer as it refers to large scale generalized production of IC. As as much as I would like to think that Labcoin shortly will be ordering $100 million dollar IC production runs I doubt that is very closely connected with reality.
July 30, 2013, 10:34:06 PM
^^ Damn you beat me to it
July 30, 2013, 10:32:50 PM
ACTM wait up to six months. . LOL. . . Time is money
You should pay more attention to the small details then!
http://labcoin.com/docs/2.jpg
July 30, 2013, 10:26:24 PM
A 130nm chip at 4.5-5GH/s with that power draw?
So, an 110nm avalon chip is 282MH/s, but you guys somehow can create a chip with bigger transistors (130nm) that is equivalent to 16-17 avalon chips?
Not only that, but you claim you've optimized the logic so much that any competing chips using similar die-sizes are left in the dust?
Size of chip die area? Operating frequency? Number of cores?
Sorry, too many red flags in the key technical aspects.
So, an 110nm avalon chip is 282MH/s, but you guys somehow can create a chip with bigger transistors (130nm) that is equivalent to 16-17 avalon chips?
Not only that, but you claim you've optimized the logic so much that any competing chips using similar die-sizes are left in the dust?
Size of chip die area? Operating frequency? Number of cores?
Sorry, too many red flags in the key technical aspects.
According to the preliminary specs (https://bitcointalksearch.org/topic/m.2664903) this chip should perform better than the BFL ASIC (65 nm) while occupying even smaller silicon area. I'm a total noob when it comes to chip designing, so can't even guess if it's possible. Any idea?
BFL - 65 nm, 16 cores, 250 MH/s each, 4 GH/s total, die size 7.1 x 7.1 mm, 12.8 W total
Labcoin - 130 nm, 16 cores, 300 MH/s each, 4.8 GH/s total, die size 6.5 x 6.5 mm, 12.8 W total
By no means I don't want to make any hints to the BFL performance as a company. On the contrary, the labcoin chip has enormous potential if everything goes well.
If those are the correct specs, then I'm sorry but... LOL!!!
For that to be possible, not only each Labcoin core would have to be ~42% smaller [65/130*(6.5^2)/(7.1^2)] than each BFL core but also the Labcoin chip would magically operate at a higher frequency (300MHz vs 250MHz) while keeping the same power draw...
Since there are several new companies going for the 130nm route with the excuse that manufacturing costs are much cheaper, might as well burst that bubble too: It's not. Nothing beats going 28nm now, except for the fact that the upfront NRE cost is much higher.
July 30, 2013, 10:24:49 PM
When can officially buy stocks?
July 30, 2013, 10:11:12 PM
A 130nm chip at 4.5-5GH/s with that power draw?
So, an 110nm avalon chip is 282MH/s, but you guys somehow can create a chip with bigger transistors (130nm) that is equivalent to 16-17 avalon chips?
Not only that, but you claim you've optimized the logic so much that any competing chips using similar die-sizes are left in the dust?
Size of chip die area? Operating frequency? Number of cores?
Sorry, too many red flags in the key technical aspects.
So, an 110nm avalon chip is 282MH/s, but you guys somehow can create a chip with bigger transistors (130nm) that is equivalent to 16-17 avalon chips?
Not only that, but you claim you've optimized the logic so much that any competing chips using similar die-sizes are left in the dust?
Size of chip die area? Operating frequency? Number of cores?
Sorry, too many red flags in the key technical aspects.
According to the preliminary specs (https://bitcointalksearch.org/topic/m.2664903) this chip should perform better than the BFL ASIC (65 nm) while occupying even smaller silicon area. I'm a total noob when it comes to chip designing, so can't even guess if it's possible. Any idea?
BFL - 65 nm, 16 cores, 250 MH/s each, 4 GH/s total, die size 7.1 x 7.1 mm, 12.8 W total
Labcoin - 130 nm, 16 cores, 300 MH/s each, 4.8 GH/s total, die size 6.5 x 6.5 mm, 12.8 W total
By no means I don't want to make any hints to the BFL performance as a company. On the contrary, the labcoin chip has enormous potential if everything goes well.
If those are the correct specs, then I'm sorry but... LOL!!!
For that to be possible, not only each Labcoin core would have to be ~42% smaller [65/130*(6.5^2)/(7.1^2)] than each BFL core but also the Labcoin chip would magically operate at a higher frequency (300MHz vs 250MHz) while keeping the same power draw...
Since there are several new companies going for the 130nm route with the excuse that manufacturing costs are much cheaper, might as well burst that bubble too: It's not. Nothing beats going 28nm now, except for the fact that the upfront NRE cost is much higher.
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