Topic: LTC FPGA discussion! - page 11. (Read 23607 times)
Stop poking fun at people Simran, change the title to like LTC FPGA discussion or something. I dont have a firm date so you dont for sure
Still trying to squeeze a demo unit out of me huh? Just to be clear we are not done yet, but we are nearing completion. I am not giving out a bunch of details for now, partly due to competition and partly due to my knowledge of how the technical aspects being limited.
I figured everyone picked up on the sarcasm....simran much as I know it breaks your heart. You are not one of the alpha testers. So far there are only 2 and I am one of them.
I'm sure you and a few others do realize I'm trollan, and made this thread to get you some more attention before the release.
Anyways, tacotime just mad cause he asked, but you said no, but he thought I was still finna test one LOL :trlf:
Pm if you're in need of a reviewer who is well known here, I have meter devices to measure power draw too.
ASIC is the eventual way to go, FPGA paves the way by making an implementation consisting only of discrete logic units.
I've been a little dubious from the start (especially that they've chosen a 13 year old as one of the alpha testers), but laSeek seems dedicated and I'm interested to see what he comes up with.
I've been a little dubious from the start (especially that they've chosen a 13 year old as one of the alpha testers), but laSeek seems dedicated and I'm interested to see what he comes up with.
umadese?
Still trying to squeeze a demo unit out of me huh? Just to be clear we are not done yet, but we are nearing completion. I am not giving out a bunch of details for now, partly due to competition and partly due to my knowledge of how the technical aspects being limited.
I figured everyone picked up on the sarcasm....simran much as I know it breaks your heart. You are not one of the alpha testers. So far there are only 2 and I am one of them.
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I turn 14 in September.
Okay. I respect the fact that you spend a lot of time on Litecoin, but it'd be beneficial if you turned down the anti-gay/pot rhetoric and trolling a bit. Of course, this is coming from one if the former capital trolls here, but I've been trying to get a little more serious lately.
ASIC is the eventual way to go, FPGA paves the way by making an implementation consisting only of discrete logic units.
I've been a little dubious from the start (especially that they've chosen a 13 year old as one of the alpha testers), but laSeek seems dedicated and I'm interested to see what he comes up with.
I've been a little dubious from the start (especially that they've chosen a 13 year old as one of the alpha testers), but laSeek seems dedicated and I'm interested to see what he comes up with.
Not sure who you mean is alpha testing it, no one has the unit but the vhdl dev for the time being. And as noted before laSeek is only advising he is not the developer.
Oh, he's the one I'd been getting info on about it before. Who is the actual dev?
As far as alpha testing I'm talking about Simram, since he's suggesting in this thread one if the first units is going to him.
ASIC is the eventual way to go, FPGA paves the way by making an implementation consisting only of discrete logic units.
I've been a little dubious from the start (especially that they've chosen a 13 year old as one of the alpha testers), but laSeek seems dedicated and I'm interested to see what he comes up with.
I've been a little dubious from the start (especially that they've chosen a 13 year old as one of the alpha testers), but laSeek seems dedicated and I'm interested to see what he comes up with.
I turn 14 in September.
jasinlee, let me know if I can help in any way - simulation/synthesis/functional verification. If needed, I can send you my credentials privately. Best wishes.
Thanks, more clear now and makes a business sense.
ASIC is the eventual way to go, FPGA paves the way by making an implementation consisting only of discrete logic units.
I've been a little dubious from the start (especially that they've chosen a 13 year old as one of the alpha testers), but laSeek seems dedicated and I'm interested to see what he comes up with.
I've been a little dubious from the start (especially that they've chosen a 13 year old as one of the alpha testers), but laSeek seems dedicated and I'm interested to see what he comes up with.
Not sure who you mean is alpha testing it, no one has the unit but the vhdl dev for the time being. And as noted before laSeek is only advising he is not the developer.
Speaking on subject, I read somewhere scrypt is too complicated to be done in ASIC, therefore FPGA is the only way to go. Is it true?
Because otherwise (and forgive someone as ignorant in HW design as me), why not skip straight to ASIC?
Because otherwise (and forgive someone as ignorant in HW design as me), why not skip straight to ASIC?
There are a couple reasons, for one something you need to understand ASICs are basically FPGAs that were custom made to do the same task, rather than a semi generic device being used to do the same function. Next to find out how to make the ASIC, you have to create the FPGA in the first place. And then there is the price, ASICs since they are completely custom, they have to be designed from the ground up and the cost is much more.
ASIC is the eventual way to go, FPGA paves the way by making an implementation consisting only of discrete logic units.
I've been a little dubious from the start (especially that they've chosen a 13 year old as one of the alpha testers), but laSeek seems dedicated and I'm interested to see what he comes up with.
I've been a little dubious from the start (especially that they've chosen a 13 year old as one of the alpha testers), but laSeek seems dedicated and I'm interested to see what he comes up with.
Speaking on subject, I read somewhere scrypt is too complicated to be done in ASIC, therefore FPGA is the only way to go. Is it true?
Because otherwise (and forgive someone as ignorant in HW design as me), why not skip straight to ASIC?
asics are more complex. besides, you never release the absolute best of what you will have to offer as your first iteration. You always need to leave something out for the next iteration so people have a reason to buy your product. Because otherwise (and forgive someone as ignorant in HW design as me), why not skip straight to ASIC?
Speaking on subject, I read somewhere scrypt is too complicated to be done in ASIC, therefore FPGA is the only way to go. Is it true?
Because otherwise (and forgive someone as ignorant in HW design as me), why not skip straight to ASIC?
Because otherwise (and forgive someone as ignorant in HW design as me), why not skip straight to ASIC?
Thanks, we have seen lots of indicators and heard of projects that we feel will cause ltc to be the leading coin in the next few months so, we like to think we are right on time.
Good to hear. LTC seems to have some good times ahead.
As this thread turns, it quite reminds me of the initial Avalon postings. The entrepreneurs were met with ridicule, then with suspicion, then with accusations, and look like what it looks now in batch 3 pre-order.
I for one learnt the lesson of never discounting anything too early (until proven otherwise), and think you guys are definitely on time to market. I suggest everyone to wait until making their judgment and will be happy to support you as an early adopter.
I for one learnt the lesson of never discounting anything too early (until proven otherwise), and think you guys are definitely on time to market. I suggest everyone to wait until making their judgment and will be happy to support you as an early adopter.
Thanks, we have seen lots of indicators and heard of projects that we feel will cause ltc to be the leading coin in the next few months so, we like to think we are right on time.
When we have a complete product, I will publish info, I am not going to take preorders or screw with peoples heads with conjecture about our final speeds/design/kwh/delivery dates/color/size/weight/cup size. I will happily chit chat about it if it does not touch on something that could cause problems later.
That makes sense.
It is just - from what I can tell that this would go beyond the effort of making a FPGA bitcoin miner and I doubt that anybody would be able to steal the concept based on a few specs. The development board alone needed to prototype the concept would cost a relative fortune alone.
Lets just say I am surprised anybody goes through the hassle at this stage of Litecoin, or you could be just on time for the big rush.
Either way good luck, you'll need it.
All internet engineers are welcome to post their opinions in Simran's thread. Have fun.
No amount of "engineering" (read: buying crap, outdated, regurgitated, often counterfeited packages and pre-made ic from (more ofthen than not) dubious sources) is capable of making magic flying pink elephants appear in the sky.
Of course it wouldn't be, Asics are not FPGAs. And as you probably did not notice I have noted before, I am not the vhdl developer...the random dude to which you refer actually is an altera engineer.
To anyone passing by:
nothing to see here, move along.
In this regard, Litecoin specialized/custom hardware will not be Bitcoin: part deux.
scrypt is made -specifically- to make custom hardware (such as fpgas, and others) attacks much more costly/less beneficial than otherwise it would be without it. Unless they have discovered a vulnerability/flaw/subtle property no one else knows about, the MOST they are going to get is power savings.
Dont expect anywhere near the same kind of advantage that asic/fpga has over other means of mining as in bitcoin. fpgas and the other forms of custom hardware wont have the same volume savings as gpus, the same amount of engineering, nor nearly the same amount of r&d $ to back it up.
again, all they will get is possibly some power savings, and even this being due to the fact they dont have to deal with the power overhead of the rest of the components in a pc gives other miners.
until (and if) this comes out and we see what it's capable of (or they post actual proof of the benefits of their custom hardware) i'm gonna stand by this, and others have no reasons to do otherwise.
nothing to see here, move along.
In this regard, Litecoin specialized/custom hardware will not be Bitcoin: part deux.
scrypt is made -specifically- to make custom hardware (such as fpgas, and others) attacks much more costly/less beneficial than otherwise it would be without it. Unless they have discovered a vulnerability/flaw/subtle property no one else knows about, the MOST they are going to get is power savings.
Dont expect anywhere near the same kind of advantage that asic/fpga has over other means of mining as in bitcoin. fpgas and the other forms of custom hardware wont have the same volume savings as gpus, the same amount of engineering, nor nearly the same amount of r&d $ to back it up.
again, all they will get is possibly some power savings, and even this being due to the fact they dont have to deal with the power overhead of the rest of the components in a pc gives other miners.
until (and if) this comes out and we see what it's capable of (or they post actual proof of the benefits of their custom hardware) i'm gonna stand by this, and others have no reasons to do otherwise.
Yup. This.
If research computer scientists haven't found an effective way to parallel compute Scrypt I doubt a random dude off an internet forum will figure it out all by himself and his soldering iron.
Litecoin FGPAs will bring an advantage of course, but it will be nowhere near as dramatic as bitcoins ASICs.
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