Topic: Swedish ASIC miner company kncminer.com - page 1896. (Read 3050071 times)

Quote from: sickpig on August 02, 2013, 07:47:36 AM

Quote from: Bitcoinorama on August 02, 2013, 05:16:49 AM

Quote from: HyperMega on August 02, 2013, 05:13:32 AM

...

I hope this is no information you got from KnC because it can't be correct.

Some semiconductor industry facts:
1) at the moment there is no 28nm fab at all in People's Rep. of China (they are of course working at building ten Wink

)
2) TSMC stands for "Taiwan Semiconductor Manufacturing Company", all there fabs including 28nm are in Taiwan
3) The only 28nm GLOBALFOUNDRIES fab (former AMD production side) is fab1 located in Dresden, Germany

Sorry, yes, my bad about GF, although Taiwan is a long disputed province of the People's Republic of China. Wink

I clearly remember someone posting a wild guess about what will be the KnC fab. it costs me quite a few to find it but eventuallly I got it:

https://bitcointalksearch.org/topic/m.2584946

it was buried into the 'orama openday report thread. it should be helpful hopefully Tongue

I think you dug up the packaging company, not the fab.

yep, you're probably right.

I don't know why but I've taken for granted that they would ASE Inc facility to produce the chip.

That's marketing: they're a "leader", "full featured", "turnkey solutions" and whatnot THEN you realize they do not actually fabricate the silicon. Grin

I think they'll be using Altera (who's using TSMC) for the fab. They were working on a special deal for the Mars, using Altera FPGA, and Altera can turn their FPGA code (RTL? forgot the exact TLA) into an ASIC.

Please don't mind me, but all companies offering RTL2GDS (standard cell ASIC synthesis and place&route) or FPGA-hardcopy/structured ASIC implementations are in this case just service providers, no foundries with fabs.

There is only a handful "pure play" foundries offering advanced nodes (< 65nm) in principle open for every customer. There are only 2 currently offering 28nm their own fabs: TSMC and GLOBALFOUNDRIES.

All other 28nm (and below) players (like Intel, Samsung, IBM, STM) are so called IDMs, offering their production capacity to some interessting high volume customers from time to time too to get a better workload in their fabs.

Yeah, I did not mean Altera is a fab. They were probably just trying to decide between Altera and eASIC (unless you know of a 3rd company they have a contract with for 28nm?).

Bitcoinorama

hero member

Activity: 532

Merit: 500

Quote from: HyperMega on August 02, 2013, 08:45:46 AM

Quote from: KS on August 02, 2013, 08:30:50 AM

Quote from: sickpig on August 02, 2013, 08:21:45 AM

Quote from: sickpig on August 02, 2013, 07:47:36 AM

Quote from: Bitcoinorama on August 02, 2013, 05:16:49 AM

Quote from: HyperMega on August 02, 2013, 05:13:32 AM

...

I hope this is no information you got from KnC because it can't be correct.

Some semiconductor industry facts:
1) at the moment there is no 28nm fab at all in People's Rep. of China (they are of course working at building ten Wink

)
2) TSMC stands for "Taiwan Semiconductor Manufacturing Company", all there fabs including 28nm are in Taiwan
3) The only 28nm GLOBALFOUNDRIES fab (former AMD production side) is fab1 located in Dresden, Germany

Sorry, yes, my bad about GF, although Taiwan is a long disputed province of the People's Republic of China. Wink

I clearly remember someone posting a wild guess about what will be the KnC fab. it costs me quite a few to find it but eventuallly I got it:

https://bitcointalksearch.org/topic/m.2584946

it was buried into the 'orama openday report thread. it should be helpful hopefully Tongue

I think you dug up the packaging company, not the fab.

yep, you're probably right.

I don't know why but I've taken for granted that they would ASE Inc facility to produce the chip.

That's marketing: they're a "leader", "full featured", "turnkey solutions" and whatnot THEN you realize they do not actually fabricate the silicon. Grin

I think they'll be using Altera (who's using TSMC) for the fab. They were working on a special deal for the Mars, using Altera FPGA, and Altera can turn their FPGA code (RTL? forgot the exact TLA) into an ASIC.

Please don't mind me, but all companies offering RTL2GDS (standard cell ASIC synthesis and place&route) or FPGA-hardcopy/structured ASIC implementations are in this case just service providers, no foundries with fabs.

There is only a handful "pure play" foundries offering advanced nodes (< 65nm) in principle open for every customer. There are only 2 currently offering 28nm their own fabs: TSMC and GLOBALFOUNDRIES.

All other 28nm (and below) players (like Intel, Samsung, IBM, STM) are so called IDMs, offering their production capacity to some interessting high volume customers from time to time too to get a better workload in their fabs.

Logistically it's probably easier to deal with someone in Europe, but this is a time play, so I guess whoever they have the most previous experience with. That said they mentioned they were courting both, so time and expense is the more crucial determinant, especially time...

HyperMega

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Activity: 129

Merit: 100

Quote from: KS on August 02, 2013, 08:30:50 AM

Quote from: sickpig on August 02, 2013, 08:21:45 AM

Quote from: sickpig on August 02, 2013, 07:47:36 AM

Quote from: Bitcoinorama on August 02, 2013, 05:16:49 AM

Quote from: HyperMega on August 02, 2013, 05:13:32 AM

...

I hope this is no information you got from KnC because it can't be correct.

Some semiconductor industry facts:
1) at the moment there is no 28nm fab at all in People's Rep. of China (they are of course working at building ten Wink

)
2) TSMC stands for "Taiwan Semiconductor Manufacturing Company", all there fabs including 28nm are in Taiwan
3) The only 28nm GLOBALFOUNDRIES fab (former AMD production side) is fab1 located in Dresden, Germany

Sorry, yes, my bad about GF, although Taiwan is a long disputed province of the People's Republic of China. Wink

I clearly remember someone posting a wild guess about what will be the KnC fab. it costs me quite a few to find it but eventuallly I got it:

https://bitcointalksearch.org/topic/m.2584946

it was buried into the 'orama openday report thread. it should be helpful hopefully Tongue

I think you dug up the packaging company, not the fab.

yep, you're probably right.

I don't know why but I've taken for granted that they would ASE Inc facility to produce the chip.

That's marketing: they're a "leader", "full featured", "turnkey solutions" and whatnot THEN you realize they do not actually fabricate the silicon. Grin

I think they'll be using Altera (who's using TSMC) for the fab. They were working on a special deal for the Mars, using Altera FPGA, and Altera can turn their FPGA code (RTL? forgot the exact TLA) into an ASIC.

Please don't mind me, but all companies offering RTL2GDS (standard cell ASIC synthesis and place&route) or FPGA-hardcopy/structured ASIC implementations are in this case just service providers, no foundries with fabs.

There is only a handful "pure play" foundries offering advanced nodes (< 65nm) in principle open for every customer. There are only 2 currently offering 28nm their own fabs: TSMC and GLOBALFOUNDRIES.

All other 28nm (and below) players (like Intel, Samsung, IBM, STM) are so called IDMs, offering their production capacity to some interessting high volume customers from time to time too to get a better workload in their fabs.

KS

sr. member

Activity: 448

Merit: 250

Quote from: HyperMega on August 02, 2013, 07:49:28 AM

Quote from: KS on August 02, 2013, 07:20:11 AM

Quote from: HyperMega on August 02, 2013, 05:43:22 AM

Quote from: FeedbackLoop on August 02, 2013, 04:44:08 AM

Quote from: HyperMega on August 02, 2013, 03:47:52 AM

I doubt that KnC or OrSOC is seen as a big customer for this project, because they probably will not order more than 50 wafers in the first year (which would be already about 3 PH).

3 PetaHash/s ? That's a very interesting number. Could you expand the calculation for us? If I am seeing correctly that would be 10 times the present total network hashing power.

Is 50 wafers some sort of bulk discount number or some sort of standard order? Maybe there;s some minimum amount of wafers?

Thanks!

KnC ASIC will have about 100 GH/s realised with 192 engine IPs (see KnC R&D news from 7/19/2013).

I assume that an engine IP is equivalent to a pipelined hash core. To realise 100 GH/s they must run at a little bit more than 500 MHz, what is feasible in 28nm.

Based on technology scaling (2x more logic on same area form technology node to next technology node) we get based on BFL hash core size (estimated based on BFL die including 16 cores removing spare area and pad frame overhead) from 65(55)nm -> 45(40)nm -> 32(28)nm an estimated area per hash core of 0.6 mm2 in 28nm.

This results in an overall KnC die area of about 115 mm2 (0.6mm2 x 192).
Adding some area for supporting logic, I would say max 120 mm2 would be a good target.

An 28nm 300mm wafer has an area of about 70000 mm2. So we get 583 dies per wafer (assuming 100% yield, not realistic I know, but you can scale it yourself to your yield assumptions).

For 50 wafer:

583 dies/wafer -> 58.3 TH/wafer
50 wafer -> 2915 TH

Minimum ordering at foundries is normally one lot (25 wafer). Maybe also half lots are possible. But keep in mind, additional wafers costs nothing compared to the initial mask costs.

+3000TH. That sounds very scary for anyone wanting to meet ROI. Anyway...

Would they need a 55mmx55mm package for a 11mmx11mm chip??

They choose the package size to handle thermal and power requirements (ir-drop and so on). It's a flip-chip design with a custom package substrat (to be designed to fit to KnC die). In principle there is no problem to put a 11x11mm2 die flip-chip on a 55x55mm2 package substrat.

Wire-bond would be a different story. It would not be possible to bond a tiny die in a huge package, because the bond wires would get to long. But KnC is NOT doing a wire bond design like e.g. Avalon/ASICMiner or Bitfury.

Thx for pointing out the flip chip/wire-bond difference. How optimistic are you about the die size? Is that fairly accurate or "fingers on screen" accurate? Wink

KS

sr. member

Activity: 448

Merit: 250

Quote from: sickpig on August 02, 2013, 08:21:45 AM

Quote from: sickpig on August 02, 2013, 07:47:36 AM

Quote from: Bitcoinorama on August 02, 2013, 05:16:49 AM

Quote from: HyperMega on August 02, 2013, 05:13:32 AM

...

I hope this is no information you got from KnC because it can't be correct.

Some semiconductor industry facts:
1) at the moment there is no 28nm fab at all in People's Rep. of China (they are of course working at building ten Wink

)
2) TSMC stands for "Taiwan Semiconductor Manufacturing Company", all there fabs including 28nm are in Taiwan
3) The only 28nm GLOBALFOUNDRIES fab (former AMD production side) is fab1 located in Dresden, Germany

Sorry, yes, my bad about GF, although Taiwan is a long disputed province of the People's Republic of China. Wink

I clearly remember someone posting a wild guess about what will be the KnC fab. it costs me quite a few to find it but eventuallly I got it:

https://bitcointalksearch.org/topic/m.2584946

it was buried into the 'orama openday report thread. it should be helpful hopefully Tongue

I think you dug up the packaging company, not the fab.

yep, you're probably right.

I don't know why but I've taken for granted that they would ASE Inc facility to produce the chip.

That's marketing: they're a "leader", "full featured", "turnkey solutions" and whatnot THEN you realize they do not actually fabricate the silicon. Grin

I think they'll be using Altera (who's using TSMC) for the fab. They were working on a special deal for the Mars, using Altera FPGA, and Altera can turn their FPGA code (RTL? forgot the exact TLA) into an ASIC.

HyperMega

full member

Activity: 129

Merit: 100

Quote from: sickpig on August 02, 2013, 07:47:36 AM

Quote from: Bitcoinorama on August 02, 2013, 05:16:49 AM

Quote from: HyperMega on August 02, 2013, 05:13:32 AM

...

I hope this is no information you got from KnC because it can't be correct.

Some semiconductor industry facts:
1) at the moment there is no 28nm fab at all in People's Rep. of China (they are of course working at building ten Wink

)
2) TSMC stands for "Taiwan Semiconductor Manufacturing Company", all there fabs including 28nm are in Taiwan
3) The only 28nm GLOBALFOUNDRIES fab (former AMD production side) is fab1 located in Dresden, Germany

Sorry, yes, my bad about GF, although Taiwan is a long disputed province of the People's Republic of China. Wink

I clearly remember someone posting a wild guess about what will be the KnC fab. it costs me quite a few to find it but eventuallly I got it:

https://bitcointalksearch.org/topic/m.2584946

it was buried into the 'orama openday report thread. it should be helpful hopefully Tongue

I read all this open day report stuff.

There are some weird statements in this report e.g. "we sent the RTL to the fab".
Sorry, but every fab I know would say: "Thanks, but what should we do with your RTL, we need an GDS-file!", which is the file format of the final layout of the chip.

What they did is a so called "RTL hand-off" to a design enablement partner of the foundry, who does or did the layout generation and sign-off for them and uploads the GDS-File to the foundry. It is not known who this partner is, could be e.g. GUC or eSilicon.

The only statement at the open day which hints to the foundry is "chip will be manufactured in Asia". The only pure play foundry with 28nm fabs in Asia is TSMC. Samsung doesn't count, it's an IDM (integrated device manufacturer), which does not offer its manufacturing capacitance to everybody.

But they also said at the open day (mid of June), that they are still about selecting the foundry, so maybe something changed here later on.

sickpig

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Activity: 1260

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Quote from: sickpig on August 02, 2013, 07:47:36 AM

Quote from: Bitcoinorama on August 02, 2013, 05:16:49 AM

Quote from: HyperMega on August 02, 2013, 05:13:32 AM

...

I hope this is no information you got from KnC because it can't be correct.

Some semiconductor industry facts:
1) at the moment there is no 28nm fab at all in People's Rep. of China (they are of course working at building ten Wink

)
2) TSMC stands for "Taiwan Semiconductor Manufacturing Company", all there fabs including 28nm are in Taiwan
3) The only 28nm GLOBALFOUNDRIES fab (former AMD production side) is fab1 located in Dresden, Germany

Sorry, yes, my bad about GF, although Taiwan is a long disputed province of the People's Republic of China. Wink

I clearly remember someone posting a wild guess about what will be the KnC fab. it costs me quite a few to find it but eventuallly I got it:

https://bitcointalksearch.org/topic/m.2584946

it was buried into the 'orama openday report thread. it should be helpful hopefully Tongue

I think you dug up the packaging company, not the fab.

yep, you're probably right.

I don't know why but I've taken for granted that they would use ASE Inc facility to produce the chip.

edit 1: fix grammar error

KS

sr. member

Activity: 448

Merit: 250

Quote from: sickpig on August 02, 2013, 07:47:36 AM

Quote from: Bitcoinorama on August 02, 2013, 05:16:49 AM

Quote from: HyperMega on August 02, 2013, 05:13:32 AM

...

I hope this is no information you got from KnC because it can't be correct.

Some semiconductor industry facts:
1) at the moment there is no 28nm fab at all in People's Rep. of China (they are of course working at building ten Wink

)
2) TSMC stands for "Taiwan Semiconductor Manufacturing Company", all there fabs including 28nm are in Taiwan
3) The only 28nm GLOBALFOUNDRIES fab (former AMD production side) is fab1 located in Dresden, Germany

Sorry, yes, my bad about GF, although Taiwan is a long disputed province of the People's Republic of China. Wink

I clearly remember someone posting a wild guess about what will be the KnC fab. it costs me quite a few to find it but eventuallly I got it:

https://bitcointalksearch.org/topic/m.2584946

it was buried into the 'orama openday report thread. it should be helpful hopefully Tongue

I think you dug up the packaging company, not the fab.

HyperMega

full member

Activity: 129

Merit: 100

Quote from: KS on August 02, 2013, 07:20:11 AM

Quote from: HyperMega on August 02, 2013, 05:43:22 AM

Quote from: FeedbackLoop on August 02, 2013, 04:44:08 AM

Quote from: HyperMega on August 02, 2013, 03:47:52 AM

I doubt that KnC or OrSOC is seen as a big customer for this project, because they probably will not order more than 50 wafers in the first year (which would be already about 3 PH).

3 PetaHash/s ? That's a very interesting number. Could you expand the calculation for us? If I am seeing correctly that would be 10 times the present total network hashing power.

Is 50 wafers some sort of bulk discount number or some sort of standard order? Maybe there;s some minimum amount of wafers?

Thanks!

KnC ASIC will have about 100 GH/s realised with 192 engine IPs (see KnC R&D news from 7/19/2013).

I assume that an engine IP is equivalent to a pipelined hash core. To realise 100 GH/s they must run at a little bit more than 500 MHz, what is feasible in 28nm.

Based on technology scaling (2x more logic on same area form technology node to next technology node) we get based on BFL hash core size (estimated based on BFL die including 16 cores removing spare area and pad frame overhead) from 65(55)nm -> 45(40)nm -> 32(28)nm an estimated area per hash core of 0.6 mm2 in 28nm.

This results in an overall KnC die area of about 115 mm2 (0.6mm2 x 192).
Adding some area for supporting logic, I would say max 120 mm2 would be a good target.

An 28nm 300mm wafer has an area of about 70000 mm2. So we get 583 dies per wafer (assuming 100% yield, not realistic I know, but you can scale it yourself to your yield assumptions).

For 50 wafer:

583 dies/wafer -> 58.3 TH/wafer
50 wafer -> 2915 TH

Minimum ordering at foundries is normally one lot (25 wafer). Maybe also half lots are possible. But keep in mind, additional wafers costs nothing compared to the initial mask costs.

+3000TH. That sounds very scary for anyone wanting to meet ROI. Anyway...

Would they need a 55mmx55mm package for a 11mmx11mm chip??

They choose the package size to handle thermal and power requirements (ir-drop and so on). It's a flip-chip design with a custom package substrat (to be designed to fit to KnC die). In principle there is no problem to put a 11x11mm2 die flip-chip on a 55x55mm2 package substrat.

Wire-bond would be a different story. It would not be possible to bond a tiny die in a huge package, because the bond wires would get to long. But KnC is NOT doing a wire bond design like e.g. Avalon/ASICMiner or Bitfury.

sickpig

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Activity: 1260

Merit: 1008

Quote from: Bitcoinorama on August 02, 2013, 05:16:49 AM

Quote from: HyperMega on August 02, 2013, 05:13:32 AM

...

I hope this is no information you got from KnC because it can't be correct.

Some semiconductor industry facts:
1) at the moment there is no 28nm fab at all in People's Rep. of China (they are of course working at building ten Wink

)
2) TSMC stands for "Taiwan Semiconductor Manufacturing Company", all there fabs including 28nm are in Taiwan
3) The only 28nm GLOBALFOUNDRIES fab (former AMD production side) is fab1 located in Dresden, Germany

Sorry, yes, my bad about GF, although Taiwan is a long disputed province of the People's Republic of China. Wink

I clearly remember someone posting a wild guess about what will be the KnC fab. it costs me quite a few to find it but eventuallly I got it:

https://bitcointalksearch.org/topic/m.2584946

it was buried into the 'orama openday report thread. it should be helpful hopefully Tongue

Gyrsur

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Activity: 2856

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Bitcoin Legal Tender Countries: 2 of 206

Quote from: timmmers on August 02, 2013, 07:21:33 AM

Quote from: dhenson on August 01, 2013, 05:52:12 PM

Quote from: Phoenix1969 on August 01, 2013, 05:29:39 PM

Looks like a real Motley Jet-lag crew.

Left to Right;

Sam (KNC), Josh (BFL), ??, Yifu (AVALON)

Who's the guy in the checkered shirt?

That's The Devil, he came to collect on that soul deal because they hadn't delivered as promised.

LOOOLLL!!!

Right, therefore his hands are only on BFL and Avalon so far. Means "You belongs to me from now on!" Grin

timmmers

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Activity: 1176

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Quote from: dhenson on August 01, 2013, 05:52:12 PM

Quote from: Phoenix1969 on August 01, 2013, 05:29:39 PM

Looks like a real Motley Jet-lag crew.

Left to Right;

Sam (KNC), Josh (BFL), ??, Yifu (AVALON)

Who's the guy in the checkered shirt?

That's The Devil, he came to collect on that soul deal because they hadn't delivered as promised.

KS

sr. member

Activity: 448

Merit: 250

Quote from: HyperMega on August 02, 2013, 05:43:22 AM

Quote from: FeedbackLoop on August 02, 2013, 04:44:08 AM

Quote from: HyperMega on August 02, 2013, 03:47:52 AM

I doubt that KnC or OrSOC is seen as a big customer for this project, because they probably will not order more than 50 wafers in the first year (which would be already about 3 PH).

3 PetaHash/s ? That's a very interesting number. Could you expand the calculation for us? If I am seeing correctly that would be 10 times the present total network hashing power.

Is 50 wafers some sort of bulk discount number or some sort of standard order? Maybe there;s some minimum amount of wafers?

Thanks!

KnC ASIC will have about 100 GH/s realised with 192 engine IPs (see KnC R&D news from 7/19/2013).

I assume that an engine IP is equivalent to a pipelined hash core. To realise 100 GH/s they must run at a little bit more than 500 MHz, what is feasible in 28nm.

Based on technology scaling (2x more logic on same area form technology node to next technology node) we get based on BFL hash core size (estimated based on BFL die including 16 cores removing spare area and pad frame overhead) from 65(55)nm -> 45(40)nm -> 32(28)nm an estimated area per hash core of 0.6 mm2 in 28nm.

This results in an overall KnC die area of about 115 mm2 (0.6mm2 x 192).
Adding some area for supporting logic, I would say max 120 mm2 would be a good target.

An 28nm 300mm wafer has an area of about 70000 mm2. So we get 583 dies per wafer (assuming 100% yield, not realistic I know, but you can scale it yourself to your yield assumptions).

For 50 wafer:

583 dies/wafer -> 58.3 TH/wafer
50 wafer -> 2915 TH

Minimum ordering at foundries is normally one lot (25 wafer). Maybe also half lots are possible. But keep in mind, additional wafers costs nothing compared to the initial mask costs.

+3000TH. That sounds very scary for anyone wanting to meet ROI. Anyway...

Would they need a 55mmx55mm package for a 11mmx11mm chip??

FeedbackLoop

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Activity: 742

Merit: 500

Wow!

Thanks for the speedy detailed estimate HyperMega!

Even if some numbers are off we get an idea of how things scale in this type of business.

HyperMega

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Activity: 129

Merit: 100

Quote from: FeedbackLoop on August 02, 2013, 04:44:08 AM

Quote from: HyperMega on August 02, 2013, 03:47:52 AM

I doubt that KnC or OrSOC is seen as a big customer for this project, because they probably will not order more than 50 wafers in the first year (which would be already about 3 PH).

3 PetaHash/s ? That's a very interesting number. Could you expand the calculation for us? If I am seeing correctly that would be 10 times the present total network hashing power.

Is 50 wafers some sort of bulk discount number or some sort of standard order? Maybe there;s some minimum amount of wafers?

Thanks!

KnC ASIC will have about 100 GH/s realised with 192 engine IPs (see KnC R&D news from 7/19/2013).

I assume that an engine IP is equivalent to a pipelined hash core. To realise 100 GH/s they must run at a little bit more than 500 MHz, what is feasible in 28nm.

Based on technology scaling (2x more logic on same area form technology node to next technology node) we get based on BFL hash core size (estimated based on BFL die including 16 cores removing spare area and pad frame overhead) from 65(55)nm -> 45(40)nm -> 32(28)nm an estimated area per hash core of 0.6 mm2 in 28nm.

This results in an overall KnC die area of about 115 mm2 (0.6mm2 x 192).
Adding some area for supporting logic, I would say max 120 mm2 would be a good target.

An 28nm 300mm wafer has an area of about 70000 mm2. So we get 583 dies per wafer (assuming 100% yield, not realistic I know, but you can scale it yourself to your yield assumptions).

For 50 wafer:

583 dies/wafer -> 58.3 TH/wafer
50 wafer -> 2915 TH

Minimum ordering at foundries is normally one lot (25 wafer). Maybe also half lots are possible. But keep in mind, additional wafers costs nothing compared to the initial mask costs.

Bitcoinorama

hero member

Activity: 532

Merit: 500

Quote from: HyperMega on August 02, 2013, 05:13:32 AM

Quote from: Bitcoinorama on August 02, 2013, 04:22:31 AM

Quote from: Bitcoinorama on August 02, 2013, 03:57:30 AM

Quote from: Bitcoinorama on August 02, 2013, 03:02:42 AM

Quote from: frankenmint on August 02, 2013, 02:52:47 AM

...BFL who ordered their casing before refining their design got lumbered with a crapload of Jalepeno cases that didn't fit. Has Bitfury showed casing? If your not comfortable with what your investing in and the design team behind it, walk away.

definitely, they have at least pictures of all components.

https://bitcointalksearch.org/topic/ann-usnorth-american-bitfury-sales-new-stock-now-shipping-251966

EDIT: my guess is, they are nearly ready with most of the parts surrounding the chips. they are waiting for ORSoC, so they have time to make trips. after the chips will arrive (maybe end of August) there are two possibilities: everything will work as expected or like BFL it will not. IMHO it is to early to get a impression of if they are like BFL.

I had seen that, the guts are there, but no casing, which is a nothing for Bitfury investors to worry over, as long as no future casing inhibits airflow, but casing is what the previous poster was concerned about here.

Also, you do realise the CEO of ORSoC, the CTO of ORSoC, and a lead ASIC design specialist of ORSoC are on the board of directors of KnC alongside Sam and Andreas, and that KnC share the same building as ORSoC? ORSoC actually accommodate KnC, there's no trips to be made, design is not outsourced, or contracted, it's in-house, around the clock, which is a huge advantage they have over competitors paying consultants that have no equity stake for a few hours here and there...

ok, thank you for the information. I remember you visited KnC in the past. And where will the chip manufacturing happen? Also in Sweden or in a other country.

Well fab will be in People's Rep. of China obv., same as all Bitcoin ASIC vendors, either at Global Foundries, or TSMC, assembly will be Sweden.

I hope this is no information you got from KnC because it can't be correct.

Some semiconductor industry facts:
1) at the moment there is no 28nm fab at all in People's Rep. of China (they are of course working at building ten Wink

)
2) TSMC stands for "Taiwan Semiconductor Manufacturing Company", all there fabs including 28nm are in Taiwan
3) The only 28nm GLOBALFOUNDRIES fab (former AMD production side) is fab1 located in Dresden, Germany

Sorry, yes, my bad about GF, although Taiwan is a long disputed province of the People's Republic of China. Wink

HyperMega

full member

Activity: 129

Merit: 100

Quote from: Bitcoinorama on August 02, 2013, 04:22:31 AM

Quote from: Bitcoinorama on August 02, 2013, 03:57:30 AM

Quote from: Bitcoinorama on August 02, 2013, 03:02:42 AM

Quote from: frankenmint on August 02, 2013, 02:52:47 AM

...BFL who ordered their casing before refining their design got lumbered with a crapload of Jalepeno cases that didn't fit. Has Bitfury showed casing? If your not comfortable with what your investing in and the design team behind it, walk away.

definitely, they have at least pictures of all components.

https://bitcointalksearch.org/topic/ann-usnorth-american-bitfury-sales-new-stock-now-shipping-251966

EDIT: my guess is, they are nearly ready with most of the parts surrounding the chips. they are waiting for ORSoC, so they have time to make trips. after the chips will arrive (maybe end of August) there are two possibilities: everything will work as expected or like BFL it will not. IMHO it is to early to get a impression of if they are like BFL.

I had seen that, the guts are there, but no casing, which is a nothing for Bitfury investors to worry over, as long as no future casing inhibits airflow, but casing is what the previous poster was concerned about here.

Also, you do realise the CEO of ORSoC, the CTO of ORSoC, and a lead ASIC design specialist of ORSoC are on the board of directors of KnC alongside Sam and Andreas, and that KnC share the same building as ORSoC? ORSoC actually accommodate KnC, there's no trips to be made, design is not outsourced, or contracted, it's in-house, around the clock, which is a huge advantage they have over competitors paying consultants that have no equity stake for a few hours here and there...

ok, thank you for the information. I remember you visited KnC in the past. And where will the chip manufacturing happen? Also in Sweden or in a other country.

Well fab will be in People's Rep. of China obv., same as all Bitcoin ASIC vendors, either at Global Foundries, or TSMC, assembly will be Sweden.

I hope this is no information you got from KnC because it can't be correct.

Some semiconductor industry facts:
1) at the moment there is no 28nm fab at all in People's Rep. of China (they are of course working at building ten Wink

)
2) TSMC stands for "Taiwan Semiconductor Manufacturing Company", all their fabs including 28nm are in Taiwan
3) The only 28nm GLOBALFOUNDRIES fab (former AMD production side) is fab1 located in Dresden, Germany

Rampion

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Quote from: kano on August 01, 2013, 04:40:54 PM

Quote from: titomane on August 01, 2013, 11:17:34 AM

Quote from: Rampion on August 01, 2013, 03:52:01 AM

Quote from: kano on July 07, 2013, 08:55:08 AM

Just a little bit of info regarding KnC
They contact ckolivas and myself at the end of May regarding cgminer and related information.

They then stated that within July they'd be sending (in July) mock up devices (with an internal RPi) for us to work with on cgminer, then in September the real (faster) devices to tune cgminer to.

I have, however, heard nothing since, but no doubt expect to hear something soon.

I'll keep everyone posted if anything happens

Knc said that within July they were sending to Kano and Ckolivas mock up devices to work on cgminer implementation.

So, now we have passed a concrete deadline we can all verify.

Kano, did you receive the mock up device?

I sent a PM to Kano a few days ago. I asked if he had been in contact with him or CKolivas KNC

He answer this:

http://anonymouse.org/cgi-bin/anon-www.cgi/http://img443.imageshack.us/img443/913/inpw.jpg

Lulz

I did post after that ... quoted post ...

So, did you actually receive the mock up unit within July as promised and are you working yet on cgminer implementation for Knc hardware?

Bitcoinorama

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Quote from: frankenmint on August 02, 2013, 04:49:56 AM

Quote from: Bitcoinorama on August 02, 2013, 04:22:31 AM

Quote from: Bitcoinorama on August 02, 2013, 03:57:30 AM

Quote from: Bitcoinorama on August 02, 2013, 03:02:42 AM

Quote from: frankenmint on August 02, 2013, 02:52:47 AM

...BFL who ordered their casing before refining their design got lumbered with a crapload of Jalepeno cases that didn't fit. Has Bitfury showed casing? If your not comfortable with what your investing in and the design team behind it, walk away.

definitely, they have at least pictures of all components.

https://bitcointalksearch.org/topic/ann-usnorth-american-bitfury-sales-new-stock-now-shipping-251966

EDIT: my guess is, they are nearly ready with most of the parts surrounding the chips. they are waiting for ORSoC, so they have time to make trips. after the chips will arrive (maybe end of August) there are two possibilities: everything will work as expected or like BFL it will not. IMHO it is to early to get a impression of if they are like BFL.

I had seen that, the guts are there, but no casing, which is a nothing for Bitfury investors to worry over, as long as no future casing inhibits airflow, but casing is what the previous poster was concerned about here.

Also, you do realise the CEO of ORSoC, the CTO of ORSoC, and a lead ASIC design specialist of ORSoC are on the board of directors of KnC alongside Sam and Andreas, and that KnC share the same building as ORSoC? ORSoC actually accommodate KnC, there's no trips to be made, design is not outsourced, or contracted, it's in-house, around the clock, which is a huge advantage they have over competitors paying consultants that have no equity stake for a few hours here and there...

ok, thank you for the information. I remember you visited KnC in the past. And where will the chip manufacturing happen? Also in Sweden or in a other country.

Well fab will be in People's Rep. of China obv., same as all Bitcoin ASIC vendors, either at Global Foundries, or TSMC, assembly will be Sweden.

The effect said glow in the editor so I tried it out. Not trying for attention by all means I'll remove it from my orig. post lol. I just want to see more at this point - October is pretty much 60 days away from now...All I've seen is Upgrades and Hosting news...As the other guy pointed out, I can see the bit-fury hardware. I see the mars prototype and what appears to be two mars fpgas facing each other in such a way that they appear to only do 6 on the prototype and what I guess is 12 on the long version of the prototype. Would I rather see Hardware and chip photos? For sure, but I figure if they were trying to not show/reveal internals that they would by now have a finalized design/concept/procurement maybe around September? Maybe I want to feel like I'm getting a quality unit all around and not just the chips/board (not a 20 dollar two bit hacked together wire mesh enclosure) It looks like a large desktop old school style IBM PC. I figured if they planned to keep it that way that by now more photos of stuff would be available.

Which only shows you haven't read up on anything. There is nothing to show. They aim to have chips in hand by September, that's all they've ever promised. See they could show you other components, but with the earlier similie I gave with respect to this being a formulae one race; McLaren aren't about to show Ferrari their upcoming seasons blueprints for their car, or for that matter reveal anything about it until the press release before the race starts. Fact is they have been spending pre-order money and are committed. They have taped out and they say everything is progressing on schedule. There is an aspect of a leap of faith, but that's why I've chosen a company with past history in designing ASICs and with a team that has an equity share and resides within the company 24/7, well within reason, they do need to sleep occasionally...

That's my reasoning, but you need to find your own.

frankenmint

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Quote from: Bitcoinorama on August 02, 2013, 04:22:31 AM

Quote from: Bitcoinorama on August 02, 2013, 03:57:30 AM