Topic: [The Wasp] 28nm ASIC Miner Open Hardware Development Project (Read 35121 times)

https://bitcointalksearch.org/topic/the-wasp-project-collective-information-thread-422243 <--- Moving to our new single thread!

Tight tight deadlines... thanks for jumping in and posting here Joe.

Meeting Yesterday:

All Projects Overview

• We are still moving forward on a number of areas and from the meeting yesterday there has been significant progress on most of the projects currently going on in the WPC. The 0.1 beta hive (backplane) will be ready in time and sent to the EE in Seattle. Firmware has progressed and will be available for prototyping with hand assembled bringup boards and further use with the first prototype boards from the fabricator.
• The WPC Pool set a hard deadline for the testing of the pool as we near completion of that project. Our website will be reworked as we wait for pretty pictures / video and other media from the EE's working on firmware and hardware and our WPC internal share exchange has started development.
• Licensing story lines have been created and are being work on currently for use on the provisioning server where the firmware / licensing will be released and will be ready before sales begin.
• At this stage we are now reaching out to the community and finding partners outside the WPC who are interested in building our designs and have included a few of these people in our recent meetings so that they can see first hand where the team is in development and ask questions to the EE's. We want to open this up to those with the resources, time and focus to build our modular miners so that they can hit the ground running. We are here to support the mining community so big or small if you are keen and have time we want to include you in this Open Source project.
• We will have A1, BitFury and BitMain available at first and when we get our hands on the Minion we will provide that as well. If you are keen on using our designs then please contact me with your questions.

Logo Winner

• dzarmush is the winner of a really close vote by our members. We want to thank everyone who participated.
• Please contact me via PM or email [email protected]
• You have won a share valued at $250 USD as well as a free lifetime membership in the WPC valued at $100 USD.

https://bitcointalksearch.org/topic/m.3901162

Hello everyone, I do not believe most of you know me, I'm Joe (obviously) and I've been tasked for the last few months with assisting with this project. I have run a mining pool for close to a year now and have developed a number of different methods for running a pool. I also have developed my own private mining pool server code, however for everyone on this project's sake I am going to be using the stratum protocol (although I am a fan of GBT and wish we could see everyone switch on over from stratum)

My part (running the actual pool server) is coming along. Infrastructure is being implemented by the end of this weekend (hopefully if everything continues to go as I plan) and test mining should begin within that time period. As others are involved more heavily in the time frame aspect i will just leave it at that, they can give more information on live updates.

If you need help with the wasp project please direct it to one of the individuals who are part of public relations. This will give me time to focus on coding.

ASIC Chip P0rn:

How many A1's to BitFury's you might ask?

The numbers that I am proposing are 'prototype' numbers or small batches 10 - 100 units. Again if you want to do an accurate pricing with say 1000+ units then I suspect you might be able to hit your target but that depends solely on A1, BitFury or BitMain chips... possibly others. We are building 4 prototype boards. A1, Minion, BitFury and BitMain. Given the cost of the chips you might be able to build sub 5K easily but that depends on the fab as well. China is the cheapest by far but control, time to market etc is more of the concern in that respect. Drop me an email we can help support anyone interested in developing a production run of our modular miners.

Also you can build 5 Wasps rather than 8 and have a cheaper build cost and let your customers buy more blades later with newer chips... as it is modular. Unlike the competition out there we are not restricted to a single chip and we can mix and match Wasps in a single Hive. We can even design and prototype Wasps with multiple chip profiles where you could have A1 and BitFury together on a single Wasp. Depending on your needs we can develop Wasps specific to a coin as well say a PPCoin or TRC or FRC only miner.

Thanks for your answer. Since this is nowhere near $4 tot $4.2k per 1 th/s machine, and it seems possible to manufacture a 1 th/s machine for less than that (http://cointerra.com/product/terraminer-ii-1ths-jan-soldout/), do you have other suggestions? The problem for me is delivery time for plug and play machines and want to spend max 4 to 4.2k per rig.

Thanks for your time!

At this point we are not open to new members unless you have the firmware skills we have an immediate need for. We will reopen membership in February and you can find that on  website when it goes up.

If you buy 10,000 A1 chips that is $2.80 / Gh/s.
Estimate the cost for a fully populated hive with PSU's, casing etc...

8 Wasps from 500+ USD / Wasp up is my guess given the complexity of the boards and components but could be higher.
1 Hive again what maybe 300+ USD up is my guess
48 A1 Chips do you calculations based on what volume of chips you purchase here http://bitmine.ch/?product=coincraft-ai-asic
PSU's 200+ USD up is my guess
4U Case 100+ USD up is my guess
Licensing unsure yet what our fee will be?

1.2 Th/s miner air-cooled.

You can figure out the costs roughly I guess?

But if you want to know exactly just wait until we release the Gerbers and BOM and build it yourself or get a costing from a fabricator near you or in China. All this will be available on our site once everything is working on the prototypes.

Anyone think its possible to build 1 th/s Coincraft A1 28nm based mining rig for $4 gh/s (or lower) considering the asics costs are $3 gh/s each (5000k)? This excluding labour, just raw materials.



 

Looking to become a paying member.  I have experience in PCB fabrication with PnP assembly, BOM tracking, refreshing and version control as well as firmware load-up and bring-up testing and verification.  I've done some Diptrace work and designed, built and verified various DIY projects (aircraft audio panel, aircraft LED position light driver, aircraft strobe driver).  Count me in for this one.  If you find yourself needing a LAMP developer I can sling some code as well.  PM and email heading your way.

H@shKraker

Logo Competition:

We will announce a winner this week.

A1, BitMain and BitFury Chips

The 2 - A1 samples got delivered today. Our feeling is that a Metal-core PCB for the A1s and their buck controllers is necessary, and then cutting slots in the FR4 Wasp will allow us to attach copper heatsinks to the metalcore, and Bergquist pads to the tops of the chips and the passives, filling the gap for an aluminum sink for the top. Hoping this initial prototype design keep the temps down in the 40s, with air. All this is necessary so as to increase the potential lifetime of these A1 first run prototype chips. This all takes time so the A1 prototype will be later than the prototype PCB's for the BitMain / BitFury Wasps. Soon as we have working prototypes we will release that information on our website. BitFury will be the first prototype to be built followed closely by the BitMain and then A1. We plan on a Minion Wasp prototype beyond these 3 initial chips. The members have put in all the funding required to pay for all the components, chips and fabrication.

WPC Mining Pool

Latest update is that the whole pool team now has access to the servers and that means it is only a matter of days before we have the pool up for testing.

Membership:

We are keen to find more firmware people to help develop a range of functions we have planned for the Wasp & Hive. If you have experience in the following areas or are keen to learn and have some background in firmware please PM me with your skills set and experience. I will push that information to our EE and see if that is what we require. If he is good with that then we can expedite your membership on that basis. As for those without those skills sets at this time we are going to hold off any new members until at least February and all membership will be through the website at that point.


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Firmware Objectives by System

This system has the following objectives:

• provide initialization of MCU resources in a safe sequence, and configuration of pin assignments that connect processor resources to their off-chip nets as specified
• provide safely sequenced initialization of off-chip resources such as CPLD programming, bus-power distribution fail-safes, and regulator initial configuration
• provide safe access abstractions for use of on-chip and off-chip resources, once they have been initialized
• provide a launch service for tasks of both classes, allowing them to register for scheduling, and to perform any requisite initialization on their data structures prior to scheduling startup
• schedule real-time bounded tasks in a fixed priority rotation
• schedule background tasks in round-robin dispatch mode, whenever no real-time tasks are ready
• preserve non-real-time context when a background task is preempted , and restore that context after the real-time tasks have all been serviced
• provide a single-shot timed event service with a minimum interval approximating 256 uS, and allow those events to be cancelled before they occur
• provide a watchdog service that prevents firmware failures from rendering the device inaccessible
• provide a fail-safe power distribution system controller, and keep it running
• provide services for driving multi-color LEDs with on-board Pulse Width Modulators, both hardware and firmware implementations
• provide safe shutdown services that can rapidly bring the system to a known-safe operational state

Operating Environment Layer Subsystems

• Initialization Subsystem
• Thread Launcher Subsystem
• Low Level I/O Subsystem
• Task Scheduler and Timer Subsystem
• Watchdog Subsystem
• Fail-safe Power Distribution Subsystem
• Shutdown Subsystem
• Registry Subsystem

Communications Layer Subsystems


Objectives

The communications layer has the following objectives for providing services to the application:

• provide an API for sending and receiving SPI messages
• provide an API for sending and receiving TWI messages
• provide an API for sending and receiving PMBUS messages, using the TWI transport
• provide an API for using the USB client link, including device descriptors and multiple endpoints
• provide the necessary management of an endpoint for Device Firmware Update (DFU) protocols

Communication Subsystems

• SPI Subsystem
• TWI Subsystem
• PMBUS Subsystem
• USB Subsystem
• DFU Subsystem

Firmware Development Guideline

Developers please note the following process for source code management.

GIT Repository Guidelines

To avoid chaos in the production and developer (a.k.a. examples) source repositories, please follow these guidelines:

• code for Atmel dev boards or non-production hardware belongs in xxxxxxxxxxxxxxxxxxxxxxxxx
• code for production and pre-production hardware belongs in xxxxxxxxxxxxxxxxxxxxxx
• your development code belongs in a personal branch of the appropriate repository. The master branch is used ONLY for polished bug-free code.
• the tip of the master branch of all repositories must always build and be as bug-free as possible. I.e. DO NOT check into the master branch development code with known bugs or that does not compile and run on device hardware. Again, development code belongs in a personal branch of the appropriate repository.

Following these guidelines will minimize the time wasted by developers chasing bugs that have been introduced into the source tree by another's unfinished code. They should easy be easy to follow since creating and managing code branches is what GIT is all about.

How to Add a New App to the Codebase

In the wasps repository there is an Atmel Studio solution with a library and two application projects. To add a new application that uses the library:

• create new debug and release solution configurations in visual studio with the name of the application in the configuration; e.g. 'Debug_bitfury' and 'Release_bitfury'
• add a new application project to the solution with name that matches or can be identified with the new configuration names; e.g. 'bitfury' or 'bitfuryWasp'
• in Configuration Manager specify that only the library and new application project are built for each new build configuration
• modify library and application project settings:
• for library project in Toolchain >> Compiler >> Symbols add APPID=; e.g. APPID=BITFURY
• for app project in Toolchain >> Linker >> Libraries >> 'Library search path' add path to directory where the linker will place the library built for this configuration
• add any other symbols needed to compile the library for the specific to the app. The number of these definitions should be few to none since every special case introduced into the library makes it more fragile and harder to maintain.
• in the library project compiler symbols define LIB_BUILD

APPID can be used in library code to build anything needed in the library for this specific app. Again, this should be done VERY sparingly and only when absolutely necessary.

LIB_BUILD is used in the library header file so that the header can be included in both the library and app builds.

Atmel Dev Tools

To develop firmware and learn firmware development for AVR-based Wasps, we use the following tools:

JTAGICE3
UC3-A3 Xplained dev board
XMEGA256-A3BU Xplained dev board
Atmel Studio (free download)

Atmel tools and development kits are available from Atmel, Mouser, DigiKey and other sources. Mouser and Digikey are recommended over Atmel since they usually ship more quickly.

The following videos provide a good introduction to the development process for Atmel parts and boards using Atmel Studio and Atmel Software Framework (ASF).

A software design process for the ASF
ASF Getting Started 1
ASF Getting Started 2

These videos describe how to use Atmel Studio to create a customized ASF-based library for specific hardware and a single firmware application. Follow the described processes to learn how to write firmware for Atmel dev boards or non-wasp hardware.

For production wasp firmware, we will need to modify the processes described in the video since we want to create a single ASF-based library customized for wasp hardware, but this library will be used by many firmware applications: namely, one application for each for type of wasp and probably (a) test/diagnostic application(s) for each wasp as well.

MAX V CPLD Dev Tools

Tools for CPLD firmware are a development board, downloadable development software and tutorial pdf and video. Downloads may require login to free Altera account:

DK-DEV-5M570ZN" development board
Quartus II Web Edition" development software (free download)
‎ "My First FPGA" Tutorial (login to free acct may be required)
"Introduction to Quartus II" and the FPGA (or CPLD) design process

Agreed, would like to become involved as I've mentioned.

Also looking to become a paying member.

We will open up membership payments in the coming weeks.

Thank-you for all the interest we will continue to update here and we should have a website, a mining pool and working prototype.

Hi - just discovered this project - are you still accepting new members?

Logo Competition

Poll runs till Tue Jan 14, 2014 3:35 am

A1 Sample Chips

Scheduled to arrive Monday on the west coast at our EE's. Some lucky developers already have their chips.

Logo Competition

We are working through a 2nd round voting now.

Members still in the running for our logo are:

medUSA https://bitcointalksearch.org/user/medusa-106054
dzarmush https://bitcointalksearch.org/user/dzarmush-176058
W-M https://bitcointalksearch.org/user/w-m-88832
Operatr https://bitcointalksearch.org/user/operatr-92499

We hope to announce the winner next week.

Winners will be given life time membership in the WPC and 1 share in any project of their choice currently offered.

As are we, we are so hyped to see a working prototype we can taste it.

As we get close we are focused on developing our network so we can work with and support anyone interested in fabrication and sales of these Open Hardware units. We are readying our RMA facilities should any in the US need repairs or maintenance we can support you there stateside. We are hopeful that most of the production of our units will be done through 3rd party fabricators following our designs, using our software and firmware that are licensed and can provide users with an unparalleled support of these units. But even if we see 3rd party production we are keen on offering, at customer cost of course, RMA services and we are also working hard to put together multiple hosting service sites for units worldwide.

Looking forward to get this done! Nice job still!

Update Mining Pool:

Looks like the pool team are finally getting things moving server wise that means the tinkering can begin. We will have more details to post next week on the mining pool.

Chips, chips and more chips

In a recent round of discussion with various members, we will have even more chips than we originally intended on the prototype side.
A1's, BitFury and BitMain all should be well "overstocked" in the coming weeks as some of our members are having their orders being filled and more samples are sent out.

WPC Logo

Still a day or two left on first round of voting we are keen to announce the winner of the contest but still need more members to chime in on the designs.
Voting is pretty tight and at least 3 designs are now in the running and I suspect we might have to do a run-off vote to break a tie.