Thanks tacotime for starting this. I would love to see more opinions.
If we got an ASIC designed for N-factor x and the N-factor changes to y. Would the N-factor x ASIC still be efficent on N-facot y?
Yes. Adjusting N-factor will not help very much so long as the ASIC already has N-factor set up to be dynamic, which should not be expensive to implement. Making it larger is ideal, but the problem is that GPUs themselves use the same trick ASICs do to calculate hashes for larger N-factors in parallel, so it's not really a huge help.
It's part of the reason I'm dropping scrypt from the next MC2 whitepaper, most likely.
Thank you for the direct response before. We have pretty much reached my level of understanding in this matter until I educate myself better.
Anyways, after looking at the code wouldn't having those extra variables be easier to implement in an FPGA?
Also, is the mixing function designed to accept a specific amount of data using one N value, or would is just take twice as long as previous Nfactor + 1?
I'm saying this because increasing the size of y by one will double the amount of memory used, and then send it off to be mixed.
In the very least, I could see the mixing speed decrease by half with every increase in N value i guess.
in OP it's in the middle of the list, missed it at first glance. 
