Nobody produces ASICs to achieve several times better performance than FPGAs, there are other advantages.
Gibberish.
I wrote - several times faster. ASIC may indeed be faster than FPGAs, but this is not so big difference. This is the difference of approximately to 100%, no 1000% and more. BFL offers us about 500% faster ASIC than existing FPGA.
I found an old comparison table:
and newer:
http://www.heliontech.com/fast_hash.htmWhat you need to understand is that this table does not show how many hashing cores can be placed on a chip.
The XC2V2000 for example only has
10 thousand slices. The table shows a SHA-256 core takes ~1000 slices and does ~1Gbps [16], so by putting 10 cores per FPGA the whole chip would do only
~10Gbps.
On the other hand, a 180nm ASIC of small size (50mm^2) has about 10 million gates. The table shows a SHA-256 core takes ~20 thousand gates and does ~2Gbps [21], so by putting 500 cores per ASIC the whole chip would do
~1000 Gbps.
Tada! There is your 100x difference. Roughly what BFL is promising (Single 832 Mhash/s vs. Single SC 60 Ghash/s.)
it is easy to say in theory, try to do this in practice
more gates = more heat = lower frequency
more core = more heat = lower frequency
you can not use gates and cores as you like
Sometimes, in some operations less gates at a higher frequency will give better performance than many gates at low frequency.
From what gives BFL: working frequency, energy consumption, they must use the 90nm process technology or below. (
http://csrc.nist.gov/groups/ST/hash/sha-3/Round2/Aug2010/documents/papers/SCHAUMONT_SHA3.pdf) .
ASIC 90nm technologies and lower are very expensive, so if they gathered enough money, they have a chance of success of course.
(
http://www.design-reuse.com/articles/12360/fpgas-and-structured-asics-low-risk-soc-for-the-masses.htmlhttp://www.dz.ee.ethz.ch/?id=1592 ->
http://www.dz.ee.ethz.ch/fileadmin/user_upload/dz/files/asiccostestimator.xls -> ASIC cost estimator)
The standard ASIC designs are still in 130nm, although this technology has more than 10 years. This is why the current FPGAs are often better than the ASIC. Of course, this is changing. (
http://www.eetimes.com/electronics-blogs/eda-designline-blog/4375159/Will-your-next-ASIC-ever-be-an-FPGA-#164386). That is why I wrote (a few posts up) that BFL is entering a new level of technology. BFL creates a very ambitious project, creates a "FAST HASH ASIC" fastest ever existed. It's very exciting to watch how they create such an ambitious project with such a small budget
it is amazing LOL
