[Work in progess] Burnins Avalon Chip to mining board service - page 157.

makngeerwork

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???

Quote from: burnin on May 31, 2013, 12:14:05 PM

To summarize your answers: yes

I'll add the components to support voltage changes on the fly.
Its not a big addition that takes a lots of time to do.

I love it, this is what we do with hardware. Might have to order more chips now.

BenTuras

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Quote from: Newar on June 03, 2013, 04:29:38 AM

Quote from: BenTuras on June 03, 2013, 04:27:27 AM

IMO if we go for an overclocking option, it should be software controllable and then a temp sensor is mandatory. I like the way Ztex has implemented it for there FPGA boards, the software chooses a balance between hw errors and speed. Likewise we should go for a temp/hw errors controlled overvoltage and maybe also speed?

BUT, al this is nice to have, if it becomes too difficult, risky or fragile, we should KISS.

Post 1 says the fan will be temperature controlled, so the sensor should be already there?

True, forgot that due to all the discussion about voltage ;-)

Newar

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Quote from: BenTuras on June 03, 2013, 04:27:27 AM

IMO if we go for an overclocking option, it should be software controllable and then a temp sensor is mandatory. I like the way Ztex has implemented it for there FPGA boards, the software chooses a balance between hw errors and speed. Likewise we should go for a temp/hw errors controlled overvoltage and maybe also speed?

BUT, al this is nice to have, if it becomes too difficult, risky or fragile, we should KISS.

Post 1 says the fan will be temperature controlled, so the sensor should be already there?

BenTuras

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IMO if we go for an overclocking option, it should be software controllable and then a temp sensor is mandatory. I like the way Ztex has implemented it for their FPGA boards, the software chooses a balance between hw errors and speed. Likewise we should go for a temp/hw errors controlled overvoltage and maybe also speed?

BUT, al this is nice to have, if it becomes too difficult, risky or fragile, we should KISS.

inuyasha

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Quote from: burnin on May 31, 2013, 09:47:43 AM

As i am finishing the hardware design a question popped up i'd like some feedback on:

Would you guys like software controlled over/under-volting?
I am thinking about providing 1.1/1.2/1.3V core voltage selection.

A per-module setting with automatic overclocking by the host software would require
huge changes to the protocol i can't provide in the given time.
But a per-cluster setting with manual overclocking would sure be do-able.
And as the Firmware is user-upgradeable more enhancements could be delivered later in deployment.

I'd go for the solution which will be ready when the chips arrive

Just a remark: if there would be a HW overclocking solution it would be nice if it was accessible when the boards are stacked... (I guess per-cluster means per-board...) So in the case of potentiometer or dip switch a 90deg solution accessible from the side.

Also a temp sensor would be nice for the calm of the mind if/when overclocking.

However if it would mean longer delivery times, I personally would opt-in for non-overclocked modules.

bitcoinminer42

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notorious shrimp!

hope your business will start soon

Stack

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Quote from: TheOrri on June 02, 2013, 02:36:07 AM

Personally, I'd opt for a simple solution. The more features, like overvolting, the more things that can break. Especially with overvolting one could permanently damage you chips. If such a feature would be implemented, it should have a very narrow range.

+1

sprint347

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So I can simply order 20x chips, send them directly to burnside, pay ~€100 and I get a working ASIC miner sent out to me?

burnin

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Quote from: fasmax on June 01, 2013, 11:45:45 AM

@burnin
Thanks for doing this project. I am going to order 1 complete 20 chip board and 1 complete 10 chip board from my zefir ordered ASIC's.

Question on the PLL VCC input (ASIC lead 7) do you have a series connected inductor like the Avalon boards? Seems like some designers did not notice it.

Thanks:)

The PLL VCC is provided by a linear regulator and is individually ferrite filtered.

Quote from: TheOrri on June 02, 2013, 02:36:07 AM

Personally, I'd opt for a simple solution. The more features, like overvolting, the more things that can break. Especially with overvolting one could permanently damage you chips. If such a feature would be implemented, it should have a very narrow range.

The Datasheet gives 1.0 to 1.3 Volts as Core voltage, with recommended at 1.2V, putting the capability in doesn't directly reduce the reliability.
Does it makes sense? - only tests can tell.

Quote from: Newar on June 02, 2013, 02:47:27 AM

Quote from: TheOrri on June 02, 2013, 02:36:07 AM

Personally, I'd opt for a simple solution. The more features, like overvolting, the more things that can break. Especially with overvolting one could permanently damage you chips. If such a feature would be implemented, it should have a very narrow range.

Can somebody link to a post where people overvolt and what (possible) issues they had?

No one has a board with the capabilities (yet), in the original avalons you'd have to solder some resistors to increase the voltage.

Newar

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Quote from: TheOrri on June 02, 2013, 02:36:07 AM

Personally, I'd opt for a simple solution. The more features, like overvolting, the more things that can break. Especially with overvolting one could permanently damage you chips. If such a feature would be implemented, it should have a very narrow range.

Can somebody link to a post where people overvolt and what (possible) issues they had?

TheOrri

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Personally, I'd opt for a simple solution. The more features, like overvolting, the more things that can break. Especially with overvolting one could permanently damage you chips. If such a feature would be implemented, it should have a very narrow range.

fasmax

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@burnin
Thanks for doing this project. I am going to order 1 complete 20 chip board and 1 complete 10 chip board from my zefir ordered ASIC's.

Question on the PLL VCC input (ASIC lead 7) do you have a series connected inductor like the Avalon boards? Seems like some designers did not notice it.

Thanks:)

nosbit

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Quote from: SebastianJu on May 31, 2013, 02:07:14 PM

Quote from: nosbit on May 31, 2013, 01:12:36 PM

hi burnin,
also think this is the right way if i understood everything right.
so this would mean a minor hardware change in your PCB layout?
but wouldn't that eventually come in conflict with as you stated:

Quote from: burnin on May 31, 2013, 09:47:43 AM

[...]
And as the Firmware is user-upgradeable more enhancements could be delivered later in deployment.

later on planned firmware upgrades that shall do the overclocking software based ?

I believe it can only be done with software when he applied the needed hardware for this before...

thats how i interpreted the whole thing, too.
just thinking of morons like myself, having a device in hands with a hardware possibility to change settings and later on the software embedded possibility...
if it is not a problem by solving this with like an if-switch (sorry for my basics...) ok...
I'm just interested in how much effort it would be implementing it in the software compared to the hardware solution - burnin, is it worth for you redesigning your so far made efforts on the board?
i mean, just for my sake at least, just don't do it because of the pressure of guys asking for the soonest point of time the whole project is finished...

SebastianJu

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Quote from: nosbit on May 31, 2013, 01:12:36 PM

hi burnin,
also think this is the right way if i understood everything right.
so this would mean a minor hardware change in your PCB layout?
but wouldn't that eventually come in conflict with as you stated:

Quote from: burnin on May 31, 2013, 09:47:43 AM

[...]
And as the Firmware is user-upgradeable more enhancements could be delivered later in deployment.

later on planned firmware upgrades that shall do the overclocking software based ?

I believe it can only be done with software when he applied the needed hardware for this before...

nosbit

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hi burnin,
also think this is the right way if i understood everything right.
so this would mean a minor hardware change in your PCB layout?
but wouldn't that eventually come in conflict with as you stated:

Quote from: burnin on May 31, 2013, 09:47:43 AM

[...]
And as the Firmware is user-upgradeable more enhancements could be delivered later in deployment.

later on planned firmware upgrades that shall do the overclocking software based ?

burnin

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To summarize your answers: yes

I'll add the components to support voltage changes on the fly.
Its not a big addition that takes a lots of time to do.

tiros

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Just another miner

Quote from: burnin on May 31, 2013, 09:47:43 AM

As i am finishing the hardware design a question popped up i'd like some feedback on:

Would you guys like software controlled over/under-volting?
I am thinking about providing 1.1/1.2/1.3V core voltage selection.

A per-module setting with automatic overclocking by the host software would require
huge changes to the protocol i can't provide in the given time.
But a per-cluster setting with manual overclocking would sure be do-able.
And as the Firmware is user-upgradeable more enhancements could be delivered later in deployment.

I would like any solutions which will give us product as soon as possible

tarmi

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yes, please!

pedromtorres

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if so good! whatever is easier for burnin!

Quote from: pitchbend on May 31, 2013, 10:11:23 AM

I think he asks because he should have enough time to implement it before the chips are shipped (if they are shipped in time by AVALON that is)...

I'd love to have the possibility to overclock my modules.

Quote from: pedromtorres on May 31, 2013, 10:02:51 AM

I think that would be cool, but we also want our boards as soon as possible :p

Quote from: Sophokles on May 31, 2013, 09:52:01 AM

Quote from: burnin on May 31, 2013, 09:47:43 AM

As i am finishing the hardware design a question popped up i'd like some feedback on:

Would you guys like software controlled over/under-volting?
I am thinking about providing 1.1/1.2/1.3V core voltage selection.

A per-module setting with automatic overclocking by the host software would require
huge changes to the protocol i can't provide in the given time.
But a per-cluster setting with manual overclocking would sure be do-able.
And as the Firmware is user-upgradeable more enhancements could be delivered later in deployment.

Yes, please! Like in Asicminer Blades. That would be a cool feature.

pitchbend

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I think he asks because he should have enough time to implement it before the chips are shipped (if they are shipped in time by AVALON that is)...

I'd love to have the possibility to overclock my modules.

Quote from: pedromtorres on May 31, 2013, 10:02:51 AM

I think that would be cool, but we also want our boards as soon as possible :p

Quote from: Sophokles on May 31, 2013, 09:52:01 AM

Quote from: burnin on May 31, 2013, 09:47:43 AM

As i am finishing the hardware design a question popped up i'd like some feedback on:

Would you guys like software controlled over/under-volting?
I am thinking about providing 1.1/1.2/1.3V core voltage selection.

A per-module setting with automatic overclocking by the host software would require
huge changes to the protocol i can't provide in the given time.
But a per-cluster setting with manual overclocking would sure be do-able.
And as the Firmware is user-upgradeable more enhancements could be delivered later in deployment.

Yes, please! Like in Asicminer Blades. That would be a cool feature.

Topic: [Work in progess] Burnins Avalon Chip to mining board service - page 157. (Read 624197 times)