It has been said along the way at some point we may stop fighting asics.
Think about it practically, an ASIC is an investment in the coin. Research, design, running, costs. Its in their interest the coin is valuable. Not "damp it to 0" phone meme.
Without this sizable bit of the market it feels like we are outside the big stream.
How could it be fairest? So maybe we run a version for a year or more in test that will be the final major revision and give everyone equal time to make and market ASIC Monero devices.
Then even some groups of people might club together and spin up something.
This has been an on going debate and it is boiling down to the benefits v/s the rewards (which itself is a debate as security of the chain is a huge reward).
As I see it this is the arguments for constant algo morphing off the top of my head go ahead and fill in the blanks.
1) continued decentralization (security from attacks and continued egalitarian purpose)
2) the longer we can hold off asics the longer we have to find a truly asci proof method as once we change to something along the lines of a asic friendly algo its game over never going back as can be seen with bitcoin.
3) The need to create an entire network of asics for a decentralized asic cross over is posponed as many have just purchased cpus to support this algo.
4) we can also push back a algo change indefinitely as long as the asic manufacturers feel it is not in their interest to create and produce one. this has been accomplished already by the forks these last few years.
Now that we have drawn the line in the sand and PROVEN that we will back that statement up by forking the algo multiple times those that create and finance asics understand that they can effectively lost by funding a asic design and rolling it out if we fork again.
So I would propose we have a spare algo to fork to is a asic developed for RandomX and when the deadline comes for the next update we push it back if there is no evidence that one is or has been designed. Of course stateing publicly that we would do this would in effect negate the threat so it would have to be kept a secret from everyone except the devs who we can trust with the knowledge that this type plan could be implemented.
Either way I would say this has brought us breathing room. Another thing is if an asic cannot be a multitude of times more efficient than existing hardware then that is a consideration on whether to create that asic. there are many variables and alot of those questions can be answered by looking at the fpga hybrid boards and seeing how they fare when they have the proper bitstream.
Shit gotta run will finish my
spitballing musings later.
reee 
