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Topic: [ANN] Bitfury is looking for alpha-testers of first chips! FREE MONEY HERE! - page 20. (Read 176728 times)

sr. member
Activity: 251
Merit: 250
Here's a couple of photo's I took while assembling an S-HASH board.

full member
Activity: 141
Merit: 102
thank you for clearing that up
hero member
Activity: 697
Merit: 500
No, 0.25A is not right.

I just measured it on the S-HASH board by putting a 1Ω resistor on the output of the 1.8V regulator. Voltage drop was 95mV, so current is 95mA for 16 chips, or about 6mA per chip, which sounds a lot better.

That is a relief, thanks!
full member
Activity: 141
Merit: 102
can anyone with chips confirm this?
sr. member
Activity: 427
Merit: 251
- electronics design|embedded software|verilog -
IOVDD current consumption should be around 0.25А at 1.8V per chip.
(from what I can tell via google translate - source: https://bitcointalksearch.org/topic/m.2964335)
The link posted shows the consumption of a chip with outputs shorted to ground, so it is the maximum a chip will consume from IOVDD. Normally it should be 10-15 times less. Just to be safe i would count 20-30mA per chip and half of that for over 100 chips

Thanks for the clarification and thanks to cscape for the actual measurement!

The most important piece is that I can switch now my design to use a tiny and cheap 150mA LDO Smiley

On S-HASH we use this one: LM1117DT-1.8
In rather clunky TO-252 casing to be on the
safe side regarding heat dissipation.

But there are even less expensive alternatives.

intron
vs3
hero member
Activity: 622
Merit: 500
IOVDD current consumption should be around 0.25А at 1.8V per chip.
(from what I can tell via google translate - source: https://bitcointalksearch.org/topic/m.2964335)
The link posted shows the consumption of a chip with outputs shorted to ground, so it is the maximum a chip will consume from IOVDD. Normally it should be 10-15 times less. Just to be safe i would count 20-30mA per chip and half of that for over 100 chips

Thanks for the clarification and thanks to cscape for the actual measurement!

The most important piece is that I can switch now my design to use a tiny and cheap 150mA LDO Smiley
KNK
hero member
Activity: 692
Merit: 502
IOVDD current consumption should be around 0.25А at 1.8V per chip.
(from what I can tell via google translate - source: https://bitcointalksearch.org/topic/m.2964335)
The link posted shows the consumption of a chip with outputs shorted to ground, so it is the maximum a chip will consume from IOVDD. Normally it should be 10-15 times less. Just to be safe i would count 20-30mA per chip and half of that for over 100 chips
ssi
member
Activity: 70
Merit: 10
No, 0.25A is not right.

I just measured it on the S-HASH board by putting a 1Ω resistor on the output of the 1.8V regulator. Voltage drop was 95mV, so current is 95mA for 16 chips, or about 6mA per chip, which sounds a lot better.

awesome, thanks Smiley
sr. member
Activity: 251
Merit: 250
No, 0.25A is not right.

I just measured it on the S-HASH board by putting a 1Ω resistor on the output of the 1.8V regulator. Voltage drop was 95mV, so current is 95mA for 16 chips, or about 6mA per chip, which sounds a lot better.
vs3
hero member
Activity: 622
Merit: 500
What about Vddio consumption?  I've been going overboard with current capacity on io, but it'd be nice to know the actual number.

Also no idea. On the M-board a 1V8/4A power supply is
used to supply VDD_IO to up to 16 M-boards. That seems
to work ok.

intron

A ioref pin should not draw any power or very little so thats why im intrested in this.

ioref != vddio

IOVDD current consumption should be around 0.25А at 1.8V per chip.
(from what I can tell via google translate - source: https://bitcointalksearch.org/topic/m.2964335)

a quarter amp per chip?   If that's accurate, I don't have enough, and neither does intron/cscape... 256 chips would require 64 amps of io current! D:

yeah, tell me ... I've put a 1.5A regulator on my board and a 1-ohm resistor so that I can measure it more accurately. I'll know for sure next week when I get my boards. I was hoping to be <150mA (so that I can use a much much cheaper 1.8V LDO Smiley )
ssi
member
Activity: 70
Merit: 10
What about Vddio consumption?  I've been going overboard with current capacity on io, but it'd be nice to know the actual number.

Also no idea. On the M-board a 1V8/4A power supply is
used to supply VDD_IO to up to 16 M-boards. That seems
to work ok.

intron

A ioref pin should not draw any power or very little so thats why im intrested in this.

ioref != vddio

IOVDD current consumption should be around 0.25А at 1.8V per chip.
(from what I can tell via google translate - source: https://bitcointalksearch.org/topic/m.2964335)

a quarter amp per chip?   If that's accurate, I don't have enough, and neither does intron/cscape... 256 chips would require 64 amps of io current! D:
vs3
hero member
Activity: 622
Merit: 500
What about Vddio consumption?  I've been going overboard with current capacity on io, but it'd be nice to know the actual number.

Also no idea. On the M-board a 1V8/4A power supply is
used to supply VDD_IO to up to 16 M-boards. That seems
to work ok.

intron

A ioref pin should not draw any power or very little so thats why im intrested in this.

ioref != vddio

IOVDD current consumption should be around 0.25А at 1.8V per chip.
(from what I can tell via google translate - source: https://bitcointalksearch.org/topic/m.2964335)
ssi
member
Activity: 70
Merit: 10
What about Vddio consumption?  I've been going overboard with current capacity on io, but it'd be nice to know the actual number.

Also no idea. On the M-board a 1V8/4A power supply is
used to supply VDD_IO to up to 16 M-boards. That seems
to work ok.

intron

A ioref pin should not draw any power or very little so thats why im intrested in this.

ioref != vddio
ssi
member
Activity: 70
Merit: 10
Designed to have a heatsink mounted to the back with airflow; I expect this sucker to require some cooling! 
If you want to overclock them and expect to much heat, please feel welcome to contact us (anfi-tec) for some watercoolers.
Furthermore for a better packing density.

That might be a good option... I'd need a waterblock that's about 100x30mm.
  • what do you think will the 12 chips produce in heat/Power consumption in idle?
  • and the same with overclocking?
  • how many of these miniboards you plan to put on a backplane/rack?
  • what distance is planned for the pci-slots (with watercooling you can pack them much closer together than with aircooling)
  • are you planing to sell these miniboards?
  • cooling from the backside of the board like the avalonchips?
i am sure that we can't use here one waterblock for two boards like we did with bitburner XX waterblock Sad

12 chips at full rate will produce around 30W.  The 40A regulator probably another 5W.
The bottom of the module has the soldermask masked back to show bare plated copper for good heat transfer.  Yes, cooling from the backside of the board.

Heatsink dimension should be 100x35mm.  I'll get you the mounting hole pattern this evening; they're 2mm mounting holes.

For the backplanes I'm designing now (for aircooling), the slots are 36mm apart.  Here's a render of a 480GH miner on a 16 way backplane:



newbie
Activity: 10
Merit: 0
Designed to have a heatsink mounted to the back with airflow; I expect this sucker to require some cooling! 
If you want to overclock them and expect to much heat, please feel welcome to contact us (anfi-tec) for some watercoolers.
Furthermore for a better packing density.

That might be a good option... I'd need a waterblock that's about 100x30mm.
  • what do you think will the 12 chips produce in heat/Power consumption in idle?
  • and the same with overclocking?
  • how many of these miniboards you plan to put on a backplane/rack?
  • what distance is planned for the pci-slots (with watercooling you can pack them much closer together than with aircooling)
  • are you planing to sell these miniboards?
  • cooling from the backside of the board like the avalonchips?
i am sure that we can't use here one waterblock for two boards like we did with bitburner XX waterblock Sad
full member
Activity: 141
Merit: 102
What about Vddio consumption?  I've been going overboard with current capacity on io, but it'd be nice to know the actual number.

Also no idea. On the M-board a 1V8/4A power supply is
used to supply VDD_IO to up to 16 M-boards. That seems
to work ok.

intron

A ioref pin should not draw any power or very little so thats why im intrested in this.
ssi
member
Activity: 70
Merit: 10

Some binning of the ASICs before assembly
might be a good idea...Wink

intron



You get that binner spun yet?   I'd love your layout if you're interested in making it public Smiley

Layout is not the problem, you need a ton of firmware too;)

intron

point taken Smiley
sr. member
Activity: 427
Merit: 251
- electronics design|embedded software|verilog -

Some binning of the ASICs before assembly
might be a good idea...Wink

intron



You get that binner spun yet?   I'd love your layout if you're interested in making it public Smiley

Layout is not the problem, you need a ton of firmware too;)

intron
sr. member
Activity: 251
Merit: 250
You get that binner spun yet?   I'd love your layout if you're interested in making it public Smiley
The PCB should be ready in a few days.
sr. member
Activity: 427
Merit: 251
- electronics design|embedded software|verilog -
What about Vddio consumption?  I've been going overboard with current capacity on io, but it'd be nice to know the actual number.

Also no idea. On the M-board a 1V8/4A power supply is
used to supply VDD_IO to up to 16 M-boards. That seems
to work ok.

intron
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