[ANN] Bitfury is looking for alpha-testers of first chips! FREE MONEY HERE! - page 22.

ssi

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Activity: 70

Merit: 10

Quote from: ktbken on September 03, 2013, 06:44:19 AM

Quote from: erk on September 02, 2013, 10:39:47 PM

Quote from: ssi on September 02, 2013, 10:33:37 PM

I'm working on an aggressive new design:

12 chips in 5x10cm, designed to work with a backplane. Onboard digital Vdd control (controllable via I2C from rpi/bbb), temp monitoring (also via I2C), overtemp Vdd shutdown. Designed to have a heatsink mounted to the back with airflow; I expect this sucker to require some cooling! 40A of Vdd current capacity allows for up to 3.3A per chip.

I'm designing the backplane system now. The initial backplane will be a bank of four of these modules, but I have grand visions of 600GH or 1.2TH miners, with windtunnel enclosures.

shouldn't you stick the edge connector near the middle of the board to stop the weight of the board trying to twist it out of the socket? Otherwise you need mounting brackets etc.

would it not be possible to design this to work with existing m-boards ?

It's certainly possible, but as far as I know they haven't published details on their designs, and the backplane is the cheapest part of the whole setup, and there are features that I am adding which the m-board likely doesn't support.

ktbken

full member

Activity: 158

Merit: 100

Quote from: erk on September 02, 2013, 10:39:47 PM

Quote from: ssi on September 02, 2013, 10:33:37 PM

I'm working on an aggressive new design:

12 chips in 5x10cm, designed to work with a backplane. Onboard digital Vdd control (controllable via I2C from rpi/bbb), temp monitoring (also via I2C), overtemp Vdd shutdown. Designed to have a heatsink mounted to the back with airflow; I expect this sucker to require some cooling! 40A of Vdd current capacity allows for up to 3.3A per chip.

I'm designing the backplane system now. The initial backplane will be a bank of four of these modules, but I have grand visions of 600GH or 1.2TH miners, with windtunnel enclosures.

shouldn't you stick the edge connector near the middle of the board to stop the weight of the board trying to twist it out of the socket? Otherwise you need mounting brackets etc.

would it not be possible to design this to work with existing m-boards ?

Andreoid

newbie

Activity: 10

Merit: 0

Quote from: ssi on September 02, 2013, 10:33:37 PM

Designed to have a heatsink mounted to the back with airflow; I expect this sucker to require some cooling!

If you want to overclock them and expect to much heat, please feel welcome to contact us (anfi-tec) for some watercoolers.
Furthermore for a better packing density.

18RATTT

sr. member

Activity: 282

Merit: 250

Quote from: ssi on September 02, 2013, 10:33:37 PM

I'm working on an aggressive new design:

12 chips in 5x10cm, designed to work with a backplane. Onboard digital Vdd control (controllable via I2C from rpi/bbb), temp monitoring (also via I2C), overtemp Vdd shutdown. Designed to have a heatsink mounted to the back with airflow; I expect this sucker to require some cooling! 40A of Vdd current capacity allows for up to 3.3A per chip.

I'm designing the backplane system now. The initial backplane will be a bank of four of these modules, but I have grand visions of 600GH or 1.2TH miners, with windtunnel enclosures.

great work, ssi. keep up posted!

Foofighter

hero member

Activity: 882

Merit: 547

BTC Mining Hardware, Trading and more

n1 work intron and cscape!

Could i see this heatsink in detail?

BR
Foofighter

ssi

member

Activity: 70

Merit: 10

Quote from: erk on September 02, 2013, 10:39:47 PM

Quote from: ssi on September 02, 2013, 10:33:37 PM

I'm working on an aggressive new design:

12 chips in 5x10cm, designed to work with a backplane. Onboard digital Vdd control (controllable via I2C from rpi/bbb), temp monitoring (also via I2C), overtemp Vdd shutdown. Designed to have a heatsink mounted to the back with airflow; I expect this sucker to require some cooling! 40A of Vdd current capacity allows for up to 3.3A per chip.

I'm designing the backplane system now. The initial backplane will be a bank of four of these modules, but I have grand visions of 600GH or 1.2TH miners, with windtunnel enclosures.

shouldn't you stick the edge connector near the middle of the board to stop the weight of the board trying to twist it out of the socket? Otherwise you need mounting brackets etc.

I've got mounting brackets in mind too. I'm going to 3d print pieces which will slide into t-slot extrusion, hold the lower right corner of the board, and serve as fan mounts. The whole enclosure will be made out of t-slot extrusion with acrylic side panels.

erk

hero member

Activity: 826

Merit: 500

Quote from: ssi on September 02, 2013, 10:33:37 PM

I'm working on an aggressive new design:

12 chips in 5x10cm, designed to work with a backplane. Onboard digital Vdd control (controllable via I2C from rpi/bbb), temp monitoring (also via I2C), overtemp Vdd shutdown. Designed to have a heatsink mounted to the back with airflow; I expect this sucker to require some cooling! 40A of Vdd current capacity allows for up to 3.3A per chip.

I'm designing the backplane system now. The initial backplane will be a bank of four of these modules, but I have grand visions of 600GH or 1.2TH miners, with windtunnel enclosures.

shouldn't you stick the edge connector near the middle of the board to stop the weight of the board trying to twist it out of the socket? Otherwise you need mounting brackets etc.

ssi

member

Activity: 70

Merit: 10

I'm working on an aggressive new design:

12 chips in 5x10cm, designed to work with a backplane. Onboard digital Vdd control (controllable via I2C from rpi/bbb), temp monitoring (also via I2C), overtemp Vdd shutdown. Designed to have a heatsink mounted to the back with airflow; I expect this sucker to require some cooling! 40A of Vdd current capacity allows for up to 3.3A per chip.

I'm designing the backplane system now. The initial backplane will be a bank of four of these modules, but I have grand visions of 600GH or 1.2TH miners, with windtunnel enclosures.

erk

hero member

Activity: 826

Merit: 500

Quote from: intron on September 02, 2013, 07:23:22 PM

Attached a Pt100 sensor and did some measurements.
Not getting very hot, only 38.5 oC. Time to start OC-ing
I guess:)

intron

Do the Bitfury chips have a sensor that can be read? cgminer does a nice job of looking after GPU clocks when it gets useful temp data.

intron

sr. member

Activity: 427

Merit: 251

- electronics design|embedded software|verilog -

Attached a Pt100 sensor and did some measurements.
Not getting very hot, only 38.5 oC. Time to start OC-ing
I guess:)

intron

LaserHorse

full member

Activity: 140

Merit: 100

Quote from: intron on September 02, 2013, 04:57:54 PM

They are rather expensive, so we decided to remove
them. But the power supply is now behaving a bit odd,
so in rev 3 some of the caps will be back:)

If you look closely you see a stack of caps just
behind the DC/DC converter. They were added
to add some more stability to the output voltage.

intron

indeed - I was a bit shocked @ the price of poscaps. 13 of them are hiding on the underside of my DC/DC converter.

Calculating Rtune & Ctune via the GigaTLynx datasheet was vague to say the least …

intron

sr. member

Activity: 427

Merit: 251

- electronics design|embedded software|verilog -

Quote from: LaserHorse on September 02, 2013, 04:52:01 PM

Quote from: intron on September 02, 2013, 04:32:53 PM

Mounted S-HASH on a heatsink and got it hashing:

[…]

Vcore = 0V8

Some bitfury ASIC stats:

stats
1 min: 2.97 3.13 3.21 3.21 2.47 2.55 2.31 3.05 3.71 2.64 2.88 2.06 3.30 2.72 2.55 3.13
5 min: 3.33 2.98 2.90 2.57 2.72 2.64 2.57 3.03 3.16 2.52 2.84 2.55 2.88 2.79 2.72 3.07
15 min: 3.23 3.14 2.91 2.51 2.82 2.60 2.71 2.79 3.02 2.68 2.71 2.58 2.93 2.96 2.96 3.03

intron

PS: I'm hashing with 41.2 GH/s FYI.

Whoah - 40GH @ 0V8 and so few caps!

What prompted the removal of the 8-cap clusters between each quad of chips? Not necessary?

They are rather expensive, so we decided to remove
them. But the power supply is now behaving a bit odd,
so in rev 3 some of the caps will be back:)

If you look closely you see a stack of caps just
behind the DC/DC converter. They were added
to add some more stability to the output voltage.

intron

LaserHorse

full member

Activity: 140

Merit: 100

Quote from: intron on September 02, 2013, 04:32:53 PM

Mounted S-HASH on a heatsink and got it hashing:

[…]

Vcore = 0V8

Some bitfury ASIC stats:

stats
1 min: 2.97 3.13 3.21 3.21 2.47 2.55 2.31 3.05 3.71 2.64 2.88 2.06 3.30 2.72 2.55 3.13
5 min: 3.33 2.98 2.90 2.57 2.72 2.64 2.57 3.03 3.16 2.52 2.84 2.55 2.88 2.79 2.72 3.07
15 min: 3.23 3.14 2.91 2.51 2.82 2.60 2.71 2.79 3.02 2.68 2.71 2.58 2.93 2.96 2.96 3.03

intron

PS: I'm hashing with 41.2 GH/s FYI.

Whoah - 40GH @ 0V8 and so few caps!

What prompted the removal of the 8-cap clusters between each quad of chips? Not necessary?

intron

sr. member

Activity: 427

Merit: 251

- electronics design|embedded software|verilog -

Mounted S-HASH on a heatsink and got it hashing:

Vcore = 0V8

Some bitfury ASIC stats:

stats
1 min: 2.97 3.13 3.21 3.21 2.47 2.55 2.31 3.05 3.71 2.64 2.88 2.06 3.30 2.72 2.55 3.13
5 min: 3.33 2.98 2.90 2.57 2.72 2.64 2.57 3.03 3.16 2.52 2.84 2.55 2.88 2.79 2.72 3.07
15 min: 3.23 3.14 2.91 2.51 2.82 2.60 2.71 2.79 3.02 2.68 2.71 2.58 2.93 2.96 2.96 3.03

intron

PS: I'm hashing with 41.2 GH/s FYI.

Fiyasko

legendary

Activity: 1428

Merit: 1001

Okey Dokey Lokey

I am absolutely loving the look of these Bitfury powered ASIC's, and even more so I love that the ASIC's were despensed to the public rather than just one building

Quote from: intron on August 20, 2013, 03:35:56 PM

bi•fury assembled and with heatsink:

It's hashing test vectors now, more to come.

intron

Note: the push button, pin header and Molex connector
are for firmware debugging only, will be removed later.

This is exactly what I was hoping to see, SUPER BLOCK ERUPTERS!

kakobrekla

hero member

Activity: 714

Merit: 500

Psi laju, karavani prolaze.

Quote from: LaserHorse on September 02, 2013, 01:12:52 AM

enter the 'BitCranky' …

speed:491 noncerate[GH/s]:20.043 (2.227/chip) hashrate[GH/s]:21.002 good:1400 errors:27 spi-errors:0 miso-errors:0 jobs:274

coreVDD = 0.84V

Very nice! Heres ours:

LaserHorse

full member

Activity: 140

Merit: 100

thnx - build process was fun, gave me some ideas for a couple of new modular designs.
Just wish I had prettier perfboard - beige/green not my ideal color scheme Wink

"Grrrrrr … more chips, more pi!", said the bitcranky

kaerf

hero member

Activity: 631

Merit: 500

lol! that is awesome!

cscape

sr. member

Activity: 251

Merit: 250

Very nice, very colorful!

intron

sr. member

Activity: 427

Merit: 251

- electronics design|embedded software|verilog -

Quote from: LaserHorse on September 02, 2013, 01:12:52 AM

enter the 'BitCranky' …

speed:491 noncerate[GH/s]:20.043 (2.227/chip) hashrate[GH/s]:21.002 good:1400 errors:27 spi-errors:0 miso-errors:0 jobs:274

coreVDD = 0.84V

Nice!!

intron

Topic: [ANN] Bitfury is looking for alpha-testers of first chips! FREE MONEY HERE! - page 22. (Read 176728 times)