It was the Bitcointalk forum that inspired us to create Bitcointalksearch.org - Bitcointalk is an excellent site that should be the default page for anybody dealing in cryptocurrency, since it is a virtual gold-mine of data. However, our experience and user feedback led us create our site; Bitcointalk's search is slow, and difficult to get the results you need, because you need to log in first to find anything useful - furthermore, there are rate limiters for their search functionality.
The aim of our project is to create a faster website that yields more results and faster without having to create an account and eliminate the need to log in - your personal data, therefore, will never be in jeopardy since we are not asking for any of your data and you don't need to provide them to use our site with all of its capabilities.
We created this website with the sole purpose of users being able to search quickly and efficiently in the field of cryptocurrency so they will have access to the latest and most accurate information and thereby assisting the crypto-community at large.
work->blk.work = work;
// output[OUTPUT_SIZE] = output[nonce & OUTPUT_MASK] = nonce;
#define FOUND (0x0F)
#define SETFOUND(Xnonce) output[output[FOUND]++] = Xnonce
SETFOUND(nonce);
// output[OUTPUT_SIZE] = output[nonce & OUTPUT_MASK] = nonce;
#define FOUND (0x0F)
#define SETFOUND(Xnonce) output[output[FOUND]++] = Xnonce
SETFOUND(nonce);
int skeinhashmid(unsigned char *out, const unsigned char *in)
{
Skein_512_Ctxt_t ctx;
Skein_512_Init (&ctx,8*64);
Skein_512_Update(&ctx,in,(size_t) 80);
memcpy(out, ctx.X, 64);
return 0;
}
#define CL_SET_BLKARG(blkvar) status |= clSetKernelArg(*kernel, num++, sizeof(uint), (void *)&blk->blkvar)
#define CL_SET_ARG(var) status |= clSetKernelArg(*kernel, num++, sizeof(var), (void *)&var)
cl_int queue_skein_kernel(_clState *clState, dev_blk_ctx *blk, __maybe_unused cl_uint threads)
{
cl_kernel *kernel = &clState->kernel;
unsigned int i, num = 0;
cl_int status = 0;
unsigned char swap[80];
uint32_t *swap32 = swap;
flip80(swap32, (uint32_t *)blk->work->data); // convert getwork data to big-endian
unsigned char mid[64];
skeinhashmid(mid, swap); // calc skein midstate?
uint64_t *state64 = (uint64_t *)mid;
uint32_t *data32 = (uint32_t *)swap;
CL_SET_ARG(state64[0]); // kernel state0
CL_SET_ARG(state64[1]); // kernel state1
CL_SET_ARG(state64[2]); // kernel state2
CL_SET_ARG(state64[3]); // kernel state3
CL_SET_ARG(state64[4]); // kernel state4
CL_SET_ARG(state64[5]); // kernel state5
CL_SET_ARG(state64[6]); // kernel state6
CL_SET_ARG(state64[7]); // kernel state7
CL_SET_ARG(data32[16]); // kernel data16
CL_SET_ARG(data32[17]); // kernel data17
CL_SET_ARG(data32[18]); // kernel data18
CL_SET_BLKARG(nonce); // kernel base, i.e. base nonce
CL_SET_ARG(clState->outputBuffer);
return status;
}
int skeinhashmid(unsigned char *out, const unsigned char *in)
{
Skein_512_Ctxt_t ctx;
Skein_512_Init (&ctx,8*64);
Skein_512_Update(&ctx,in,(size_t) 80);
memcpy(out, ctx.X, 64);
return 0;
}
#define CL_SET_BLKARG(blkvar) status |= clSetKernelArg(*kernel, num++, sizeof(uint), (void *)&blk->blkvar)
#define CL_SET_ARG(var) status |= clSetKernelArg(*kernel, num++, sizeof(var), (void *)&var)
cl_int queue_skein_kernel(_clState *clState, dev_blk_ctx *blk, __maybe_unused cl_uint threads)
{
cl_kernel *kernel = &clState->kernel;
unsigned int i, num = 0;
cl_int status = 0;
unsigned char swap[80];
uint32_t *swap32 = swap;
flip80(swap32, (uint32_t *)blk->work->data); // convert getwork data to big-endian
unsigned char mid[64];
skeinhashmid(mid, swap); // calc skein midstate?
uint64_t *state64 = (uint64_t *)mid;
uint32_t *data32 = (uint32_t *)swap;
CL_SET_ARG(state64[0]); // kernel state0
CL_SET_ARG(state64[1]); // kernel state1
CL_SET_ARG(state64[2]); // kernel state2
CL_SET_ARG(state64[3]); // kernel state3
CL_SET_ARG(state64[4]); // kernel state4
CL_SET_ARG(state64[5]); // kernel state5
CL_SET_ARG(state64[6]); // kernel state6
CL_SET_ARG(state64[7]); // kernel state7
CL_SET_ARG(data32[16]); // kernel data16
CL_SET_ARG(data32[17]); // kernel data17
CL_SET_ARG(data32[18]); // kernel data18
CL_SET_BLKARG(nonce); // kernel base, i.e. base nonce
CL_SET_ARG(clState->outputBuffer);
return status;
}
skc.coinmine.pl:6400 0:1:Pitcairn 72.0[277.086 MH/s (~181 MH/s)] [Rej: 96/275 (34.91%)]