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Topic: BTCMiner - Open Source Bitcoin Miner for ZTEX FPGA Boards, 215 MH/s on LX150 - page 16. (Read 161727 times)

hero member
Activity: 784
Merit: 500
Somehow I managed to do this to my boards:


Every board has the same serial number? Is there any way of changing that back to normal or ar all the other serials gone?

BTC miner doesn't complain about this at all. Everything works fine Wink Just curious how I did this and if it is "bad" for some reason?
hero member
Activity: 489
Merit: 500
Immersionist
Thanks. A misunderstanding I guess, I thought after power cycling they would become "unpgrogrammed".

donator
Activity: 367
Merit: 250
ZTEX FPGA Boards
Maybe it's just a bit late, but isn't this command to program all devices?

java -cp ZtexBTCMiner-120221.jar BTCMiner -m p -f ztex_ufm1_15d3a.ihx

...

... programs all unprogrammed FPGA board.

In order to re-programm devices, -pt or -ps has to be used, see http://www.ztex.de/btcminer/ for details.
hero member
Activity: 489
Merit: 500
Immersionist
Maybe it's just a bit late, but isn't this command to program all devices?

java -cp ZtexBTCMiner-120221.jar BTCMiner -m p -f ztex_ufm1_15d3a.ihx

It just outputs a "No devices found" and exits.

But then

java -cp ZtexBTCMiner-120221.jar BTCMiner -i

outputs the following:

Code:
Enter RPC user name:
Enter RPC password:
0: bus=bus-0  device=4 (`\\.\libusb0-0004--0x221a-0x0100')  ID=221a:100
   Manufacturer="ZTEX"  Product="btcminer for ZTEX FPGA Modules"    SerialNumber="04A32E00E9"
   productID=10.0.1.1  fwVer=0  ifVer=1
1: bus=bus-0  device=5 (`\\.\libusb0-0005--0x221a-0x0100')  ID=221a:100
   Manufacturer="ZTEX"  Product="btcminer for ZTEX FPGA Modules"    SerialNumber="04A346CEC7"
   productID=10.0.1.1  fwVer=0  ifVer=1
2: bus=bus-0  device=6 (`\\.\libusb0-0006--0x221a-0x0100')  ID=221a:100
   Manufacturer="ZTEX"  Product="btcminer for ZTEX FPGA Modules"    SerialNumber="04A3469722"
   productID=10.0.1.1  fwVer=0  ifVer=1

So the devices are clearly there. It also doesn't work after power cycling, "No devices found" again.

If I run my (small) cluster with the following, everything works fine. It programs the devices then starts mining.

java -cp ZtexBTCMiner-120221.jar BTCMiner -host "http://pool.ABCPool.co:8332" -u xxx -p yyy -l 120221-d3a-cluster.log -m c

Code:
(Re)Scanning bus ...
ztex_ufm1_15d3-04A32E00E9: New device: bitfile=ztex_ufm1_15d3   f_default=200.00MHz  f_max=240.00MHz  HpC=1.0H
ztex_ufm1_15d3-04A32E00E9: FPGA configuration time: 3247 ms
ztex_ufm1_15d3-04A32E00E9: Set frequency to 200.00MHz
Starting mining thread for bus bus-0-0
bus-0-0: ztex_ufm1_15d3-04A32E00E9: added
ztex_ufm1_15d3-04A3469722: New device: bitfile=ztex_ufm1_15d3   f_default=200.00MHz  f_max=240.00MHz  HpC=1.0H
ztex_ufm1_15d3-04A3469722: FPGA configuration time: 3236 ms
ztex_ufm1_15d3-04A3469722: Set frequency to 200.00MHz
bus-0-0: ztex_ufm1_15d3-04A3469722: added
ztex_ufm1_15d3-04A346CEC7: New device: bitfile=ztex_ufm1_15d3   f_default=200.00MHz  f_max=240.00MHz  HpC=1.0H
ztex_ufm1_15d3-04A346CEC7: FPGA configuration time: 3256 ms
ztex_ufm1_15d3-04A346CEC7: Set frequency to 200.00MHz
bus-0-0: ztex_ufm1_15d3-04A346CEC7: added

Summary:
  Bus bus-0-0   : 3 devices
  Total         : 3 devices


Disconnect all devices or press Ctrl-C for exit.
Press "r" Enter for re-scanning.
donator
Activity: 367
Merit: 250
ZTEX FPGA Boards
Is this something i can do on my own or do you need to build that into BTCMiner (or could you?)

No, it need to be done in the software. I will do this in the next release.

Currently only the submitted blocks are logged.
hero member
Activity: 784
Merit: 500
Is this something i can do on my own or do you need to build that into BTCMiner (or could you?)
donator
Activity: 367
Merit: 250
ZTEX FPGA Boards
It would be nice to know to which pool the bounce is submitted. CGMiner does tho, so could you add something like this to BTCMiner.

just an info like "nounce 924872847 submitted to pool 0"?

BTCMiner can log the submitted blogs (-bl). Adding the server name should be easy.
hero member
Activity: 784
Merit: 500
It would be nice to know to which pool the bounce is submitted. CGMiner does tho, so could you add something like this to BTCMiner.

just an info like "nounce 924872847 submitted to pool 0"?
full member
Activity: 199
Merit: 100
Did you install the 64 bit Java?

No, just the 32 version:
sudo apt-get install openjdk-6-jre (for earlier verisons)
or
sudo apt-get install openjdk-7-jre (for Ubuntu 11.10)
worked fine for me.
donator
Activity: 305
Merit: 250
Did you install the 64 bit Java?
full member
Activity: 199
Merit: 100
Hey, is anybody running BTCMiner on Linux?  What distro are you using?

My win7 box suddenly died, and I really don't want to go back to win7 unless I have to.  I tried Ubuntu/Fedora before but couldn't get it to work. 

I run BTCMiner on Ubuntu 11.10. Works without any problems. Just install Java before running BTCMiner.
donator
Activity: 305
Merit: 250
Hey, is anybody running BTCMiner on Linux?  What distro are you using?

My win7 box suddenly died, and I really don't want to go back to win7 unless I have to.  I tried Ubuntu/Fedora before but couldn't get it to work. 
donator
Activity: 305
Merit: 250
Here is an idea that I am using for my own setup:

I have the boards cooled by the stock heatsink/fan and a bunch of Silverstone FM121s connected to a NZXT-2 temperature monitor/fan controller.  It works pretty well.  Do note that the NZXT-2 runs the fan at a minimum of 50% RPM, which for the FM121's are still too loud for my taste (maybe the FN121 would be quieter).  It might not work for rupy's passive setup, but it's a thought.

http://www.newegg.com/Product/Product.aspx?Item=N82E16811992005
hero member
Activity: 784
Merit: 500
Hm now the usb errors are gone.

I think it has something to do with parallels Coherence mode ....

Thx BR0KK
hero member
Activity: 725
Merit: 503
Yes, but if there is a bug, your chip is toast (f.ex. say the firmware = software raises the frequency to 400Mh = bye bye chip). Compare it to Intel vs. AMD a few years ago; Intel has always had hardware temperature shutdown of it's chips while AMD, well many friends have toasted their CPU because of software/fan malfunction. If you are serious you have temperature hardware control or at least temperature software control.

Of course, you get what you pay for.
legendary
Activity: 1022
Merit: 1000
BitMinter
It's weird that there is no protection on expensive hardware yes! From xilinx and from ztex...

What do you mean by no protection ? The protection works perfect ! Saved my 1.15d about 20 times when i had my heatsink troubles. It gets hotter, my boards run slower. All works as it should. Why not use a nice 140mm fan ? They run at like 16 dB and provide some nice airflow.
hero member
Activity: 725
Merit: 503
Ok, I'll live with it.

I didn't quite get that the error/frequency mechanism was in the firmware. I would make the Java code decide frequency instead.

It's weird that there is no protection on expensive hardware yes! From xilinx and from ztex, would be a good addition to the Artix-7 series.

What about the "Algorithmically placed FPGA miner", will you look at that or is it doomed to fail too?
donator
Activity: 367
Merit: 250
ZTEX FPGA Boards
Hm, so they sell you a 160$ without adding a temperature sensor to it? I mean common, intel sells you a complete Atom motherboard with processor, GPU and everything for 80$!?!? I'm pretty sure theres a temp thingy inside the Spartan-6, it's just not connected on the ZTEX board?

What makes you so sure? The fact the the FPGA board is more expensive than a Atom Mainboard?

Spartan 6 FPGA's does not have on-die temperature sensors.
donator
Activity: 367
Merit: 250
ZTEX FPGA Boards
Code:
[quote author=BR0KK link=topic=40047.msg802071#msg802071 date=1331771156]
2012-03-14T17:33:07: bus-0-2: ztex_ufm1_15d3-04A32E1205: Error: bus=bus-0  device=\\.\libusb0-0003--0x221a-0x0100: Read hash data: libusb0-dll:err [control_msg] sending control message failed, win error: Das Gerät erkennt den Befehl nicht.
: Disabling device

This are USB errors, usually caused by bad cables, hubs or unstable power supplies. A driver / OS problem is possible too.






donator
Activity: 367
Merit: 250
ZTEX FPGA Boards
Then can I get a parameter for specifying the initial frequency and another to disable initial step-up of frequency. You can cap the initial frequency parameter to max 200 since I'm going to use this to _lower_ the frequency for passive cooling during summer.

I already answered it when you asked it per Email: Reducing the frequency limit would break the overheat detection. Therefore I will not this add a feature.

The only thing I can offer is to compile a firmware with a frequency limit of 120 MHz. (This is where the frequency limit is defined. The host software is board independent.) But if the airflow fails in a setup where the FPGA boards stacked densely (as in your configuration) the FPGA boards will also overheat if they only consume 6W. The only difference is that this will not be recognized by the software.

It is most save for you if you run the software as it is. If the airflow fail, you have to restart the cluster after fixing the problem.
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