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Topic: BTCMiner - Open Source Bitcoin Miner for ZTEX FPGA Boards, 215 MH/s on LX150 - page 27. (Read 161816 times)

legendary
Activity: 1029
Merit: 1000
In GPU/CPU world each piece overclocks differently. You may have a worse piece. I've wonder what hashrate could be possible with peltier cooling Wink I have two modules (50W & 70W) from an old days when they cooled my celeron 333@560. Temp was -18C...
hero member
Activity: 504
Merit: 500
if I understand his software correctly, it automaticly adjusts the freq up/down based on the error rate. With that in mind if we 'force' the unit to 200MHz and it is getting a theoretical 10% error rate the hash rate would still be 180MHs.  It would be nice to have the option to manually adjust the error tolerance though to set the optimum limit of error/freq ourselves.

  Have you done anything to try and further cool the chip to see if that helps?

I have an extra 92mm fan blowing at the board. Your right about self adjustment. It changes to 192 MHz on startup but then always goes back to 184 MHz. At 184 the error rate is below 0.3 %.

my one is different it starts at 200 then it changes to 192 and holds stable

  Your's sounds more what I would expect from the latest production he has out.  I am wondering, do you guys know what voltage your units are? I.E. what resistance is on R12/R13?

  I'm just tossing things out, since I unfortuantly do not have one of these units to test. But I am wondering if it could be a thermal compound issue. Do we know what compound was used to set the heatsinks and what its cure time is?
newbie
Activity: 45
Merit: 0
if I understand his software correctly, it automaticly adjusts the freq up/down based on the error rate. With that in mind if we 'force' the unit to 200MHz and it is getting a theoretical 10% error rate the hash rate would still be 180MHs.  It would be nice to have the option to manually adjust the error tolerance though to set the optimum limit of error/freq ourselves.

  Have you done anything to try and further cool the chip to see if that helps?

I have an extra 92mm fan blowing at the board. Your right about self adjustment. It changes to 192 MHz on startup but then always goes back to 184 MHz. At 184 the error rate is below 0.3 %.

my one is different it starts at 200 then it changes to 192 and holds stable
legendary
Activity: 1022
Merit: 1000
BitMinter
if I understand his software correctly, it automaticly adjusts the freq up/down based on the error rate. With that in mind if we 'force' the unit to 200MHz and it is getting a theoretical 10% error rate the hash rate would still be 180MHs.  It would be nice to have the option to manually adjust the error tolerance though to set the optimum limit of error/freq ourselves.

  Have you done anything to try and further cool the chip to see if that helps?

I have an extra 92mm fan blowing at the board. Your right about self adjustment. It changes to 192 MHz on startup but then always goes back to 184 MHz. At 184 the error rate is below 0.3 %.
hero member
Activity: 504
Merit: 500
Will there be an option to change the frequency manually in the future ? After 48h or so i'm down to 180 to 190 MH/s but that's at 184 MHz. Would be nice to be able to play around with the frequency  Wink

  if I understand his software correctly, it automaticly adjusts the freq up/down based on the error rate. With that in mind if we 'force' the unit to 200MHz and it is getting a theoretical 10% error rate the hash rate would still be 180MHs.  It would be nice to have the option to manually adjust the error tolerance though to set the optimum limit of error/freq ourselves.

  Have you done anything to try and further cool the chip to see if that helps?
legendary
Activity: 1022
Merit: 1000
BitMinter
Will there be an option to change the frequency manually in the future ? After 48h or so i'm down to 180 to 190 MH/s but that's at 184 MHz. Would be nice to be able to play around with the frequency  Wink
donator
Activity: 367
Merit: 250
ZTEX FPGA Boards
How much does the bump from 1.23V to 1.25V raise effective hashing rate.

Typical hash hate will be 194 MH/s. Some FPGA boards will achieve 200 MH/s at a small error rate and some Boards will achieve 192 MH/s at (almost) no errors.
donator
Activity: 1218
Merit: 1079
Gerald Davis
I plan to test it with 1.3V. But currently I have no suitable resistor values lying around. If this works I will switch the production to 1.25V.

Here are the results of the 1.3V test: With the current BTCMiner version the test board achieved 208 MHz at an error rate of about 2%.

Due to the absolute maximum voltage of 1.32V and due to the voltage overshoots caused by the inductor at load removal I do not recommend more than 1.27V. I will switch the production from 1.23V to 1.25V.

How much does the bump from 1.23V to 1.25V raise effective hashing rate.

So it is:
1.23V 192 MH/s w/ 0% error rate = 192 MH/s effective (old production)
1.25V ??                                                              (new production)
1.27V 200 MH/s w/ 0% error rate = 200MH/s effective (overvolting)
1.30V 208 MH/s w 2% error rate = 204MH/s effective  (not recommended)
donator
Activity: 367
Merit: 250
ZTEX FPGA Boards
I plan to test it with 1.3V. But currently I have no suitable resistor values lying around. If this works I will switch the production to 1.25V.

Here are the results of the 1.3V test: With the current BTCMiner version the test board achieved 208 MHz at an error rate of about 2%.

Due to the absolute maximum voltage of 1.32V and due to the voltage overshoots caused by the inductor at load removal I do not recommend more than 1.27V. I will switch the production from 1.23V to 1.25V.

donator
Activity: 367
Merit: 250
ZTEX FPGA Boards

Just out of curiosity what is the command structure for using backup pools, Is it like this

Code:
-host pool1 -u user1 -p pass1 -host host2 -u user2 -p pass2

How is the backup pool system working is it priority based e.g if pool 1 is down, does it switch to pool 2 untill pool 1 is active and switch back to it.

See the section "General usage". Backup pools are specified by -b.

Due to backward The syntax is a little bit strange:
Code:
-host pool1 -u user1 -p pass1 -b host2 user2 pass2 -b host3 user3 pass3 ...

newbie
Activity: 45
Merit: 0
Is there a way to setup a way to setup a backup pool with BTCMiner?

A new release is available at http://www.ztex.de/btcminer

New features are backup pools an improved behavior at bad nework connectivity.


I cant seem to find the latest version on the BTCMiner page

Fixed. Try it again.

Just out of curiosity what is the command structure for using backup pools, Is it like this

Code:
-host pool1 -u user1 -p pass1 -host pool2 -u user2 -p pass2

How is the backup pool system working is it priority based e.g if pool 1 is down, does it switch to pool 2 untill pool 1 is active and switch back to it.

edit: Just read the -help file and seen the structure
donator
Activity: 367
Merit: 250
ZTEX FPGA Boards
Is there a way to setup a way to setup a backup pool with BTCMiner?

A new release is available at http://www.ztex.de/btcminer

New features are backup pools an improved behavior at bad nework connectivity.


I cant seem to find the latest version on the BTCMiner page

Fixed. Try it again.
newbie
Activity: 45
Merit: 0
Is there a way to setup a way to setup a backup pool with BTCMiner?

A new release is available at http://www.ztex.de/btcminer

New features are backup pools an improved behavior at bad nework connectivity.


I cant seem to find the latest version on the BTCMiner page
donator
Activity: 367
Merit: 250
ZTEX FPGA Boards
Is there a way to setup a way to setup a backup pool with BTCMiner?

A new release is available at http://www.ztex.de/btcminer

New features are backup pools an improved behavior at bad nework connectivity.
donator
Activity: 367
Merit: 250
ZTEX FPGA Boards
Any plan to test R13 with a 2k Ohm? Maybe just a 2k1 to be safer first.  Pust it until it POPs, m8. ;p

I plan to test it with 1.3V. But currently I have no suitable resistor values lying around. If this works I will switch the production to 1.25V.
hero member
Activity: 504
Merit: 500
 I noticed on the printed board it reads 1k2 for R12 but there is a 1k3 resistor in it, as you stated. I am curious if the 1k2 print is intended as a working, safe voltage.

1.23V is still save.

The core voltage is calculated by VCCINT = (R12/R13+1)*0.8V


   Thanks for the formula, that clears up everything. *slaps head*  I was bass ackwards and was thinking, for whatever dumb reason that lowering R12 resistance would raise the out voltage. doh. ;p  I got it now. Thank you again!!

  Any plan to test R13 with a 2k Ohm? Maybe just a 2k1 to be safer first.  Push it until it POPs, m8. ;p


    Cheers,
       Derek
full member
Activity: 154
Merit: 102
Bitcoin!
This looks quite interesting (watching topic)
donator
Activity: 367
Merit: 250
ZTEX FPGA Boards
  I noticed on the printed board it reads 1k2 for R12 but there is a 1k3 resistor in it, as you stated. I am curious if the 1k2 print is intended as a working, safe voltage.

1.23V is still save.

The core voltage is calculated by VCCINT = (R12/R13+1)*0.8V
hero member
Activity: 504
Merit: 500
Is there any chance we can sweet talk you into dropping a 1.26v resistor onto one to see the results? =)
I'll try this out next week.

I tested it with a prototype. Here are the results:

At 1.23V core voltage (default, R12=1.3kΩ, R13=2.4kΩ): 192 MHz @ 0.0% error rate
At 1.27V core voltage (R12=1.3kΩ, R13=2.2kΩ): 200 MHz @ 0.0% error rate

Those who increase the core voltage (by replacing R12 and/or R13) have to do this on their own risk. The absolute maximum voltage according to the specs is 1.32V. But voltage overshoot has to be taken into account. These overshoots occur at load removal (FPGA reset) and are caused by the energy stored in the coil. The overshoot voltage at a nominal voltage of 1.27V is larger than 1.32V.

On the other hand, the limit of 1.32V is calculated by 1.2V + 10%, i.e. this value is (at least a little bit) arbitrary.  IMHO 1.27V is still quite save, but I cannot guarantee for it.

  I noticed on the printed board it reads 1k2 for R12 but there is a 1k3 resistor in it, as you stated. I am curious if the 1k2 print is intended as a working, safe voltage.
  Can you verify the voltages for given resistor combo in R12 and R13?

  I.e., am I reading correctly that;
      R12 @1.3kOhms, R13 @2.4kOhms = 1.23v?
      R12 @1.3kOhms, R13 @2.2kOhms = 1.27v or 1.30v?
      R12 @1.2kOhms, R13 @2.4kOhms = 1.27v?
      R12 @1.2kOhms, R13 @2.2kOhms = 1.30v or 1.32v?

  Thanks in advance for your patience in answering such simple questions! I have not read resistor color bars or done Ohms resistance calculations for going on 15 years now. ;p  I.e, TC boards at last hi-tech jobs were 90% throw away and only about 10% actual 're-design/verification' of circuits. sad sad, I know, but its cheaper to outsource that engineering these days for most 'non-custom design' companies. =)


        Cheers
   
hero member
Activity: 504
Merit: 500

Pls remove my private data.

Power requirement is about 9.5W (=8.5W*sqr(1.27/1.23)*200/192)



fixed but its stuck in your quote for now...

  Thanks for the numbers.
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