Ok fair enough, my mistake. I just don't understand why they would go with 130 considering power would play such an important role in their ROI. That just lead me to believe they are using the same fab and the chips are easier to acquire. I mean, if you're going to make your own, why 130? Cheap?
Because it's not just twice as expensive to manufacture a chip on half the die size. It's ORDERS OF MAGNITUDE more expensive to get a die made in 65nm than to manufacture a die for 120-130nm.
Designing and producing a 130nm chip can be done for a few tens of thousands, or maybe low hundreds of thousand of dollars (depending on how motivated and talented the engineers are, and whether they're working on spec or for salary).
Going to 65nm is probably potentially half a million up to a million dollars (or more). Anybody who wants to get into the ASIC game is pretty much going to have to start in the 120-130nm die size range, and then build enough capital in order to fund research and development into the 65nm or smaller. If it was as easy as just jumping right on the latest die size, why didn't you suggest they got straight to 45nm die size?
It's always entertaining when people who don't know anything about the industry purport to tell people like electrical engineers what's "current technology" and what isn't.