Topic: GekkoScience BM1384 Project Development Discussion - page 39. (Read 146665 times)

2112, I was kinda hoping you'd toss in an opinion. This is getting fun, and the innards specifics of a chip are well outside my knowledge.

I like TO220, but right-angle mounting heatsinks to boards changes mechanical concerns a lot. You do probably get better heat transfer from chip to sink than through the board, so instead of 50 10W chips you could run more like 10 50W chips which changes things again. High-power chips make string topology less feasible so efficiency is more of a concern, and making the best use of your machine's internal volume gets trickier when boards and heatsinks are at right angles. By no means impossible - but trickier. I'd still like to see something with a practical max of about 10-20W per chip as that gives you a lot more flexibility in varying designs.

A high-power part would limit flexibility in design by reducing modularity/granularity (you'd never see a TO220 effectively used on a USB stick) and, like existing high-current BGA designs, could increase the complexity and decrease the efficiency of regulator designs. I do agree wholeheartedly that "using any package with multiple tens or even over hundred pads is completely pointless" and makes every part of the process more difficult. What's an effective minimum number of pins for a mining ASIC using SPI with an internal PLL? Vcore and PGND, VDD_IO and SGND, and four for IO?

Touchè

Perfect for whom?

I'm going to kinda restate what I wrote 2012 to friedcat, unfortunately he deleted his replies same day he made them.

https://bitcointalksearch.org/topic/m.1062969

1) the case needs to be one of the many power analog IC packages, like the one for the popular L298N motor buffer chip. I'm not up to speed on this market anymore, so I don't know the current market trends. In the past the popular power package was an 8-pin variant of the TO-3. There are 7-lead variants of popular TO-220 available cheaply:

http://www.psitechnologies.com/products/todo220.php

using any package with multiple tens or even over hundred pads is completely pointless and greatly reduces the chip's reliability. The fact that the connections are repetitive (e.g. 10 * Vcc) doesn't matter as the silicon has negative temperature coefficient and those repetitive parallel connections are inherently unstable and susceptible to the thermal runaway.

2) the chip has to be from the start designed using the mixed-signal workflow. The hashing cores have such a high tolerance for errors that they have to be from the start designed as analog circuitry with individual choice of noise margins for each gate/transistor.

3) the only digital portions of the chip will be the overall glue logic and clock generation & distribution. UART is probably the best one could do because of the paucity&expense of the synchronous chips handling SDLC/HDLC/other reliable protocols.

4) It needs two-stage clock generation system, probably a simple internal multi-phase PLL and more advanced external PLL supporting fine tuning the operating frequency. The hashing chip is by necessity very repetitive and one can be assured of the existence of rather high-Q internal parasitic resonances. Some clock generators support spread spectrum clocking where the clock is continuously varied to avoid exciting resonances (both internal and external to the chip). Those spread-spectrum clock generators are cheap because people frequently use them to sidestep the FCC restrictions on spurious radio emissions.

5) If we are really into dream leagues then we can think of the Intel's planar integrated magnetics to move the voltage regulators to the surface of the chip.

With a 10x10mm you could probably go 12-15W without a lot of problems, thinking from a chip-level power density scale (though it would depend on actual die size and Tjc) - if we're comfortable with 10W from an 8x8, 10x10 has 1.56 times the surface area for heat transfer.

I do like 1mm pitch pinned. That'd be all sorts of easy to work with, make a lot of room for third-party designs to pop up from everywhere.

Could you elaborate on the internal Vcore current shunt?

Digital clock setting would be nice. If I'm understanding right, analog could require more external parts and be harder to keep stable and consistent in a long chain or in a string topology?

Top-clock efficiency of 0.1W/GH would be pretty balls. Even 0.3W/GH would be nice, but if this chip doesn't exist until this time next year it'd probably have to be 0.1 to be competetive.

All that's stuff I'd like to see, as someone who'd be working with the chips on a board design. Any silicon guys want to chip in? (no pun intended)

A supplier.............................

So the perfect hash chip would be:

1) 10x10mm QFP-EP or QFN-EP
2) Contact pitch = 1.00mm
3) Max Power consumption ~10W
4) Single belly pad for Grnd
5) Vcore supplied on pins on one side exclusively
6) 3 wire SPI interface ground plane referenced
7) Implemented in 14nm
Internal RTD
9) Internal Vcore current shunt
10) Mean targeted Hash Rate 100 GH/s
11) Targeted efficiency less than .1 W/GH/s
12) Cost per chip ~$3

What's the preference for setting clock analog or digital?
I'm assuming digital, but . . . .

What am I missing?

One one hand we could just quote the Wikipedia page:
and ask "what's the point of Type-C without USB3?"

But on the other hand you have a market segment with money burning in their pockets and literally demanding "go ahead and take my money and rip me off!"

I think sidehack mentioned earlier that he isn't interested in "making another toy for hipsters," which I understand and agree.

But on the other hand, who's left in this market, beside hipsters with money burning their pockets?

[/quote]

Well, according to wiki: https://en.wikipedia.org/wiki/USB_Type-C
But hey, its wiki, and there is no source citing this..
and yes, its has the pins for usb2 differential paired lines. also the differential usb3 TX and RX lines.

The only time i use USB3 is when one of my customers have a usb3 port and i can use my usb3 hdd dock to backup their data.
imo there is no need for usb3 unless there is big data to move around, you don't see printers or keyboard or mice going into usb3 realms.

Still, i think this is getting a little out of hand, i had to poke the fire a little with the usb type-c sick, the way i see it, sidehack/novak does not need to do usb3 support, its the drivers on the system that need to properly work out the usb2 side off the 3 port.

That is one thing that is sorely lacking in this industry. Integrity.
Thanks for sending over the sample unit.  I am going to post about it in Phil's thread.  You did really nice work. I am very impressed.
I emailed over the into question list to you guys as well for the interview.
Sorry about the delay my wife had a baby last week and the couple weeks leading up to it she was in a lot of discomfort.

Keep up the good work and standing up for the mining community.

I think I'm able to speak for both Novak and I when I say we're also unwilling to knowingly rip people off. We leave that task for literally everyone else in the bitcoin economy and they're probably better at it than we are.

Who's left in this market? Well, I think people who aren't already rich and looking to get richer by way of doing zero work are kinda underrepresented. People without tens of thousands of dollars (or more) to burn, who would like access to reliable and efficient machinery that's also actually worth buying and not already worn out. You know, folks that don't like to be exploited. They're definitely being ignored by manufacturers.

At least here we are on the same page, it is too early, IC prices are too high.

But I've been observing the Bitcoin mining market for many years. A lot of purchasing decisions are being made for the reason of acquiring a status symbol, novelty, desire to gamble, etc. Just look at Spondoolies and their neato designer rack mountable cases.

Or just look upthread:

One one hand we could just quote the Wikipedia page:
and ask "what's the point of Type-C without USB3?"

But on the other hand you have a market segment with money burning in their pockets and literally demanding "go ahead and take my money and rip me off!"

I think sidehack mentioned earlier that he isn't interested in "making another toy for hipsters," which I understand and agree.

But on the other hand, who's left in this market, beside hipsters with money burning their pockets?

Valid point, that probably is more important.  The part where this doesn't affect USB3 is what has me confused- first you were arguing that people were going to switch from USB 2.0 for the same reasons they did from USB 1.1- and now I'm rewriting history for disagreeing with that point for the wrong reason?  You said:


Not THAT rare.  Anything where you want to capture a stream of data could qualify.


An ARM9 controller with integrated USB3 is not a USB3->UART chip.  It's an ARM9.  It's also a $16 chip in quantity 2000, which is about 10x a USB-UART converter.  I know, I know, you're not advocating for using it yet.


Nothing needs anything beside assembler if you have the skillz! (yes, the z is required too)  I'm currently programming a cortex M3 in asm (not bitcoin related). 


And I'm pretty sure I already agreed with that.  But it will probably be a slow transition because there is so much USB 2 gear to phase out.  And I'm well aware that you're no shill.  It seems that we said fairly similar things but still managed to start each sentence with "No, you're wrong."

--
novak

All this talk about USB2/3, and no one talking about USB Type-C standard? these are the high speed, enough power to charge a laptop, plug it in up-side-down, can hold 5KG on the solder points, super duper end of all connections.. and its also "usb3 standard" with its comms.

oh, and PlanetCrypto, you want ethernet for the sticks? get a TL-WR703N and flash it with OpenWRT, install cgminer, and away you go
to buy one of them would probably close to the cost of getting a mining stick with ethernet capabilities.


8051/2s are cheap.. all you need is something to manage data and switch between chips, or if they are stringed enough data to give all the chips something to calculate, then push the data back to the host. you're right, you don't need something expensive.


thats if you're buying the genuine Intel branded thing (i wonder when the old fable 80286-12 is going that way, i own a working system with one them)  .. but you could get in-bedded type cheaply enough.. ATtiny should do the data push/pull easy enough

Can you even buy a 4004?
Now I have something to look up.

Looked it up.
Evidently these old CPU's have become collector's items Selling for as much as $1,000 each.
Had I only known.

To clarify - I think I said I didn't want to put a micro on a stick miner but that it'd be necessary for a future [larger multi-chip] miner with integrated digital voltage control, temp sensing and fan speed. I'd rather not stick a 32-bit ARM on something to do a job a 4004 could handle. If in the future we shift to a USB3 interface with good driver support for primitive serial interface and a bundled micro I'd be a fool not to use the micro, but as you said, that's in the future. Yes, USB3 will eventually subsume USB2. But in the meantime we also have a butt-ton of <5W SBCs with USB2 that folks already have and would like to keep using.

My stated opinion - anything I'm working on right now will be USB2 exclusive unless Novak wants that to change. The future is the future and subject to change.

While I mostly agreed with your previous post, with this post I mostly disagree. You are essentially doing a historical revisionism.

The historical serial bandwidths peaked at 115200 bps for RS-232 or 230400 bps for RS-422 (Apple Localtalk). The devices supporting or requiring higher USART speeds are extremely, extremely rare.

The main driving force for USB 1.1 to USB 2.0 upgrade was that 1.1 devices slowed down the USB hubs forcing people to the inconvenient setups involving separate hubs for USB 1.1 and USB 2.0. At the same time USB 1.1 and USB 2.0 still used nearly exactly same PHY interface, in particular using the same copper pair for the signaling.

The situation with USB 3.0 is different. The USB 3.0 signals go over a separate pair of copper pairs (4 additional wires altogether) with the completely duplicated PHY interface to maintain the galvanic contact and compatibility with old USB 1.1/2.0 signaling copper pair. This not only duplicates the copper wires but duplicates the silicon area. Only the 3.0 portions of the circuitry receive the benefits of the new technology. Here's the short quote from the Texas Instruments' TUSB1310A: "Fully Adaptive Equalizer to Optimize Receiver Sensitivity". But it is only engaged when device works in the USB 3.0 regimen, not when in backward compatibility USB 2.0 mode.

In my opinion this is nearly the same technological shift that happened when the parallel interfaces got replaced by the serial interfaces. It slowly became obvious that de-skew-ing the parallel buses is more complex than ser-des-ing the serial buses. Once the adaptive noise equalizers become ubiquitous intellectual property macros everyone will switch to the newer standards just to take advantage of the increased reliability and noise immunity.

The necessary devices already exist. I mentioned Cypress FX3:

but I want to reiterate that I'm not advocating implementing them now. It may be worth considering for the future.

http://www.cypress.com/fx3
http://www.cypress.com/products/ez-usb-fx3-superspeed-usb-30-peripheral-controller

In a nearby thread sidehack mentioned that his ideal USB stick miner will have "8-bit AVR microcontroller with firmware coded in assembly, probably less than 200 lines". Well, here it is an USB 3.0 peripheral controller with 32-bit ARM and 0.5MB RAM for free, but probably needs C programming, not just assembler.

Again, I'm not advocating developing it now and I'm not shilling for Cypress or Texas Instruments. But it is the way of the future. The USB 1.1/2.0 after many years completely subsumed old DB-9/DB-25/Centronics cables. The modern, advanced high speed serial buses USB 3.x/Thunderbolt/Lightning will subsume the classic, rather primitive USB generations.

USB 1.1 is 1.5 Mb/s, or substantially lower than you might want to run a serial port (SPI or USART, especially- something clocked is probably happy running an order of magnitude faster, depending on the physical layer).  USB 2.0 is 480 Mb/s, or so far above what you'd want to do with a serial chip in any situation that there's really no reason to use it- especially since USB 3.0 can fall back to operate in USB 2.0.

I guess drivers could be considered an advantage, but I doubt that anyone is in a hurry to develop USB 3.0 chips just for drivers.  The incentive for chip manufacturers is low, since few of their customers want to redo their (existing, supported in OSs) design based around slightly better drivers, and so much existing infrastructure is USB 2.0.  It might be better for new projects- although you'd have to get your engineers up to speed.

I suppose they will probably exist eventually, but I doubt it will come out any time soon.  Remember, USB 3.0 is going on seven years old and there are currently no USB 3.0 - > SPI/UART/etc. chips.  Things like flash drives and SATA, which directly benefit from the higher speeds, have been out for years- because you DO want to run them faster than 480 Mb/s.

--
novak

When standards are properly supported and the chips to use them are common, if we're still building miners we'll probably start building USB3 miners. I reckon until an interface chip that doesn't suck is available we'll stick with standard 2.0

I only partially agree with what you wrote. Your point of view is very short term.

Currently there are no USB 3.0 to serial/SPI/I2C chip. But there will be. Sort of like the initial serial chips were USB 1.1, but everybody mostly converted to USB 2.0, despite backward compatibility.

Same thing will happen with USB 3.0 transition. It is "backward compatible", but the signals are carried over different pins, and only the native USB 3.0 get the benefit of the better noise immunity and the hardware equalization that is applied only to the USB 3.0 signals.

I expect that in the future there will be native USB 3.0 serial/SPI/I2C/JTAG & other rather low bandwidth protocol integrated circuits. Currently I've only seen USB 3.0 to SATA bridges, but that exactly parallels the USB 2.0 evolution when one of the first chips were USB 2.0 to ATA bridges.

The other significant improvement over USB 2.0 will be when the XHCI drivers will mature. XHCI interface is generally significantly better designed than the older UHCI/OHCI/EHCI interfaces. The XHCI is in my opinion destined to win purely on its being from the start designed to properly support virtual machines.

https://en.wikipedia.org/wiki/Extensible_Host_Controller_Interface

I don't know if the current problems with USB 2.0 mining devices plugged to USB 3.0 ports are caused by hardware (e.g. lower noise margins on the USB 2.0 pins) or by the driver problems caused by the cgminer attempting to threat USB 3.0 controller port & hub as an USB 2.0 controller port & hub and seeing only the fraction of the true picture.

The IC devices to natively support USB 3.0 will be on the market in several years. Maybe even -ck and kano will deign to read the XHCI documentation and update the cgminer to properly use their capabilities and not run them in their backward compatibility mode? Stranger things had happened in the Bitcoin milieu.

Add that to the cheapo 40A fuses those came with, and the fuse sockets that I don't completely trust to 40A let alone 49*1.5= 73.5A load without bursting into flames (a fairly common sight on those hubs).

If you have a power supply over about 370W then yes, otherwise you can't fill every port.  Typically the actual USB power jacks are only rated for about 1.5A so that becomes something of a practical upper bound- though I haven't seen one fail.