Topic: Klondike - 16 chip ASIC Open Source Board - Preliminary - page 133. (Read 435369 times)

Seems reasonable. I'd question the cost of milling out so much metal but maybe with CNC it's pretty cheap to do that. Wouldn't milling a small 0.5mm raise and deeper holes at the connector pins be less CNC time? I don't know about that. One thing - there is 3 other small pads under the buck regs. They should have raised pads to match but I can't tell if that's already accounted for.

I can't say if this is the best method. It could be fine or having more contact with the board mask overall may still provide quite a bit more heat transfer. Even though the board is not a great conductor there is a lot of surface area that is lost by using raised pads. Before committing to a large purchase I'd suggest testing both ways to see the temperature difference.

Thank You!
I'm still working on getting bitcoin into $$. FC4B has nothing until Tuesday now.

Off the top of my head I think it's 32 midstate, 24 pre-calc, 12 data, 8 clk cfg and with 8 chips/bank 32 bytes nonce data. Maybe it's not 12 bytes data. I don't have it in front of me now but I recall the Avalon driver having 12 bytes in it's task structure.

That would be 84 same for both banks + 32 different = 116 bytes.
At 4Mbps that's 29uS, though I think it will take a bit longer due to software clocking limits.

edit: oops. That's bytes not bits. x8 = 232 uS.

@ BkkCoins
How many bytes of data to you have to shift into each Avalon chain to configure the chips?

BTC donated to scope fund!

What about board flex?

The opposite actually. 3.5mm high feet on the bottom of the heat sink which attach directly to the board, and give enough clearance for parts everywhere else.

You're thinking thermal pads to account for lack of surface flatness?

https://bitcointalksearch.org/topic/m.2262454

Lemme know what you think.

[/quote]
 cutting me out and get to market first. Why would I want to help them do that?

Avalon makes a few $$ off each chip, and CKOlivas ought to make a few $$ off each miner (which I don't have the power to enforce), and I guess I should get a couple $$ for each Klondike.

[/quote]

Well said mate. As soon as working prototype is there will contact you to agree on licensing and support. You will be getting fair share of of every Klondike build and sold by me and my team and hope that future will bring more exciting projects like this.

I wanted to talk about this, bit didn't want to pollute this thread:

Will the bitcoin arms-race end with this generation of ASICs?
https://bitcointalksearch.org/topic/will-the-bitcoin-arms-race-end-with-asics-215394

Fair enough I thought it was about Avalon in general. Yes at this point in time, there is much more to be made mining than selling unless you can get tens of thousands for it.

This discussion is regarding an individual who owns ONE Avalon. He's not a manufacturer. Selling it doesn't make sense.

If it takes them an hour to make a unit and get it out the door its way more profit than mining for an hour. I don't see what a month has to do with it, they don't take that long to build.

Actually, I don't think the math supports it. At current difficulty should be about 8K per month.

Do the math, there is more profit in selling the gear than using it.

Even at 40 GH/s they are making 1.8BTC a day! Why would they be selling it?! Seems fishy to me.

Looks somewhat legitimate... although it would be best for local pickup! (says Newark, CA)
http://cgi.ebay.com/ws/eBayISAPI.dll?ViewItem&item=190844255633

Anybody in California (LA area possibly, although newspaper has a mailing label on it) that can go put eyes-on the broken Avalon listed on eBay?  Could probably get a collection together between the board devs and buy it... should be 240 chips available.  Thread on it in custom hardware...

One big fish at a time big guy. 

Thank You. Very much appreciated.

Actually I just followed their design. I figured if it's working for them... and they designed the chip. I thought about tying it to the PIC to control but then some things put me off that. I'd have to run another line all over the board and it's getting crowded already. And, if I did that I'd have to reset all 16 chips at once, which I wondered when I'd want to do that. I think the chip is pretty much free running which means if it gets mucked up I should be able to push work data and force it into a valid state. So if Avalon relies on it only for POR, then I'm assuming that's the only time it's really needed. One possible use was to hold it in reset to go into power saving / standby mode. But I can disable the clock for that which I think will work ok.

I'm really sorry I missed that ADS8202 scope that went for $305 on ebay. I was watching that and thinking it would be sweet to get because it has a Logic Analyser option (1GS/s 16 ch.), but I fell asleep and then it was sold. That's what started off this whole scope quest. A four channel would be fabulous but it's just a bit too much money. The Chinese mfrs. haven't got into that yet and the Tektronix and similar would be a lot more money. More than I could justify. I have a cheap Logic Analyser that can give me 8-32 lines (with not so much storage) and I think I'll get by with that. Mostly my concern was that I had nothing to look at non-digital signals, or view how crappy they get, and this will alleviate that. Maybe next year for Gen II Avalon?

This is the MSO7102TD which is similar to what that SDS8202 could become with module. The SDS7102 doesn't have such an upgrade path.

http://www.ebay.com/itm/Owon-New-2-in-1-Digital-Mixed-LA-Oscilloscope-MSO7102TD-8-LCD-100MHz-/221227423798?pt=BI_Oscilloscopes&hash=item33822e9836

That would likely be the next useful step up at $800 - unless I'm wrong. Maybe you have something better in mind for less money?

edit: Actually checked again - the MSO7102TD has a rather crappy 6K/ch. storage limit. To get the 2M/ch. storage you have to spend $900+ for the MSO8102TD.

BkkCoins,

I just put another BTC in your OScope fund. Maybe if you get enough extra you could get more than two channels. Just a suggestion.

I have a question about the design: How are you generating the ASIC resets? Is it driven by the PIC? The Avalon design of one RC per ASIC seems to me the worst possible design - more components for inconsistent resets per ASIC.

drewh