Topic: Modular FPGA Miner Hardware Design Development - page 29. (Read 119320 times)

So 5x16=80A on mobo DIMM bus power rails is no problem?

Again with the currents: for two FPGAs, you need only two regulators: [email protected] and 1x(3.2A+0.6A)@2.5V. While they are a bit pricey (40EUR per DIMM for 25 DIMMs), they seem really simple: nearly no external components needed.

For the biggest Xilinx Spartan 6 and 80% efficiency:

(1.2V * 5A + 2.5V * (1.6A + 0.3A)) / 12V / 0.8 = 1.12A

For 4FPGAs this would be 4.5A, let's say 5A.


I have no clue what O_Shovah thought. Maybe 8 or 16?

I think we should limit the maximum number of FPGA's per DIMM to a number of two.

Merging the layout of Olaf.Mandel and me this would provide enough space for all Components we introduced yet
 (2 FPGA's plus voltage regulators, EEPROM,Bus device,USB port,Barrel and Molex connector)

If we use the 1.2 V voltage regulators proposed by TheSeven we could supply both FPGA's with one regulator for 1.2 V and 4 voltage regulators for 2.5 V.

Further in would like to limit the number of DIMM slots to 5.This would be sufficient or a first series (1-2Ghash/s) and will limit the currents and size of the first boards.

In addition we may design the DIMM PCB to hold 2 FPGA's but leave one of the FPGA pads and the corresponding voltage supply unpopulated for a first prototyp and the budget series.  



  

Cool part! And for this thing, the efficiency is higher by not going with a rail voltage. There are only very few external components needed. Only small issue: the package is 15x15mm^2 (compare that to the 19x19mm^2 for the CSG484 package of the FPGA).

How much power will you be pulling through the DIMM bus with this?

And how many cards on single mobo are you thinking?

I'm thinking of something along the lines of this: http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail&name=LTM4601EV-1%23PBF-ND
That would provide 0.6-5V at 12A, has a wide input voltage range (4.5-20V), gets >80% efficiency and costs $20 in quantities of 100 or $34 for a single part.

What about something like this (klick on image to see full size):



The board is 45mm high and has 4 FPGAs (Xilinx XC6SLX150 in the smallest package). The components are all on one side, but I probably left too little room for the auxiliary components of the switchers (see my previous post on them: LM3150, 3x LM21215A-1). As you can see, I cannot make the Molex connector fit.

Comments?

I i remember right, there were made experiments by having a chain on consecutive gates with an inverting feedback that form an temperature dependant oscillator whose frequency could be compared against the normal PLL output. I don't remember the dependency found, but it could be a way to  get the junction temperature without any extra hardware.

The other day I thought up a way to protect the FPGAs from heat-death without the use of a temperature sensor.

Designs loaded into the FPGA are typically routed to operate below 85C. That means that if the FPGA gets hotter than 85C, the FPGA will begin making random computational errors. So the controller can be programmed to shut down the FPGA if it notices a significant number of errors. According to the datasheet for Cyclone 4 FPGAs, the maximum operating Junction Temperature before damage is 125C. That's a fairly safe margin from 85C, so I imagine this technique would be effective.

This would fail if the FPGA gets hot very quickly, so it certainly isn't a perfect solution. It might be good enough though, under the assumption that most dangerous scenarios would arise from slowly rising heat levels.

As there have been no further objections so far i will fix the following points regarding power supply:

- Each DIMM board features an wide range input ~11-18V over either a Molex 8981 or a Barrel 2.5/5.5 connector.

- In addition the DIMM socket provides a 12 V rail supplied by an ATX PSU via the Mainboard if in Modular use.

- The voltage regulation providing the voltages needed for the components on the DIMM is located on the DIMM itself.    

I am sorry guys. Seems like it was really to late for me yesterday.


Yes i did. I changed the numbers accordingly.

If we want to use multiple FPGA's on one DIMM board without exeeding a certain height we will be forced to use both sides for voltage regulation and IO devices.
I know this will make it more expensive but i'm affraid thats the way to go at least in a further series.   


The socket lock should just pass by them both. You certainly may move them a little to guarantee they are no obstacle.I will fine tune this once i draw it in 3D CAD.
You are right about the USB connector we may locate it at the edge of the board. But im may not say if it is  nessesary to make it inaccessable while the board is connected via the DIMM bus system.

You've got a point there. As i allready said i did this by mistake.
I had a look into PMIC DC DC switching regulators with 5 A 1.2A out and 18V input,but they also barely strike 70% eff
Also i asume this PWM signal may be problematik for a constant voltage supply.

I would appreciate it if you could have a look into that subject and name some parts you consider the best for this application.     

LDOs for 1.2V? Seriously?
You're talking 6% efficiency and 170W of power dissipation in the regulator for just one FPGA?

This would increase the manufacturing cost somewhat: two different masks for paste.


There are actually two comments:

• The mini-USB connector, the barrel connector (and possibly even the Molex connector) are very close to the edge. Don't they interfere with the lever for the DIMM socket lock?
• The mini-USB connector is facing down: I assume this is to discourage plugging anything in while the board is sitting in the DIMM socket. But what about the thickness of the plug? The connector should probably go to the edge of the board and just hope that the user doesn't plug it in...

Can't say I agree with these values. If you design for a XC6SLX150, then you need:

• 5A @ 1.2V = 5 regulators
• 1.9A @ 2.5V = 2 regulators

So you planned too many of the 2.5V and too few of the 1.2V regulators. Did you mix them up?

So here is a first rough sketch of how the location of the parts could look like with the use of two FPGA's on one board.
It will certainly need aditional capicitors an resistors for voltage regulation.
Additional parts like EEPROM's or sensors havent been accounted yet.
This setup is using both front and back of the board for components.

All sizes are in Millimeters

http://imageshack.us/f/685/fpgaboardsketch.png/ ( i may not post images directly yet)

This is just a first idea though so please feel free to criticise and change it.


I asume we are going to have a 4 layer board or more.

I had a look for some voltage regulators asuming we choose the option of a wide range input of ~11-18V and one FPGA not using more than 15W including losses.

Using the values provided by Olaf.Mandal found:

EDITED

Voltage regulator 18 V to 2.5 V  2.5 W  2x per FPGA http://search.digikey.com/scripts/DkSearch/dksus.dll?Detail&name=R-78AA2.5-1.0SMD-ND

Voltage regulator 18 V to 1.2 V 1 A   2x per FPGA http://www.mercateo.com/p/139-1467363/V_REG_LDO_1A_1_2V_SMD_Typ_FAN1112SX.html

The size of the DIMM DDr 2 socket http://portal.fciconnect.com/res/en/pdffiles/doc_search/10005639.pdf

is ~133 mm in length and in our case the height is only limited by the strenght of the PCB material.

I will add a rough drawing of a possible layout later.

watching

I only looked at the Xilinx Spartan-6 FPGAs, specifically the XC6SLX75-3FGG484 and XC6SLX150-3FGG484. Assuming you are not interested in bitstream encryption, there are three different supplies:

VCCINT = 1.2V
VCCAUX = 2.5V or 3.3V
VCCO_# = 1.2V or 1.5V or 1.8V or 2.5V or 3.3V
where # runs from 0 to 3 (or 1 to 4, depending on your reference).

When booting the device, the combination VCCAUX=3.3V and VCCO_2=1.8V is forbidden. Also, VCCO_2 must be one of 1.8V, 2.5V or 3.3V.

As I didn't want to change voltages during operation and as I wanted minimally small voltages, this leaves the combination:

VCCINT = 1.2V
VCCAUX = VCCO_2 = 2.5V

I connected the other banks to 2.5V also, but they will not pull a lot of current. Please note that while both pull 2.5V, the supplies for VCCAUX and VCCO_2 are not identical! You can use the same switcher, but because VCCAUX powers the frequency synthesizers (among other things), it needs an extra filter on the input.

As for other chips: the clock oscillator can run off 2.5V, any level shifters would run off that voltage, too, on their FPGA-facing side. The other side should be powered by the same supply that powers the chip that connects to the level-shifter. So the supply of the USB chip or directly powered by the backplane.

The I2C chips (EEPROM and temperature sensor: we still need to decide what to add to the board) should run off of VCCO_2, also: this way they can be on the same side of the level-shifters as the FPGAs.

This only leaves the USB chip: This can be either powered from the USB bus (my preferred option) or off of the 5V voltage rail. My reason to go bus powered: this way the USB chip can send the FPGAs sleeping if the host computer goes down, saving electricity cost in case of a network outage or a software bug that crashes the host.

 So one additional interesting question is wich voltages are needed onboard the DIMM for FPGA,  EEPROM, Bus chips and other parts ?

So to wich level  do we have to convert the 11-20 V input ?