Pages:
Author

Topic: Process-invariant hardware metric: hash-meters per second (η-factor) - page 5. (Read 25021 times)

legendary
Activity: 2128
Merit: 1073
What's missing is enough of my free time to dig through a 42-page thread.
Fair enough. But I gave you a link to a two page thread where all the relevant information was in the first half of the first page.
Calm down dude.
I'm calm, just confused, like many others here. I see you writing posts then almost immediately deleting them, it only adds to the confusion.

Anyway, here's the available Block Erupter a.k.a. ASICMINER information.

Update

Chip Specification
Technology Summary:
  130 nm
  1 Ploy
  6 Metal
  1 Top Metal
  Logic Process
Core Voltage: 1.2 V
I/O Voltage: 3.3 V
Core Frequency: 335 MHz
Core Frequency Range: 255-378 MHz
PLL Multiplier: 28
Power Consumption: 4.2 J/GHash
Number of Pads: 40
  22 Data
  18 Power
Package Type: QFN40
Packaged Chip Size: 6 mm x 6 mm
Our chips
Generation 1: Block Eruptor. 130nm with 6-8J/GH. Each chip's rated frequency is 336MHz at 1.05V. It translates to 336MH/s because it does one hash per cycle. The chips work stable and well at 392MH/s at 1.15V. Further overclocking needs proper handling of heat and power supply.

There are still no definite information about the die size. There are two posts that predate the tape-out.
Hashrate: 1.25GH/s per chip
Area: 17.5mm^2 per chip
Power Consumption: 13.3W
Hashrate: 1.00GH/s per chip
Area: 21.7mm^2 per chip
Power Consumption: 8.23W

I'm also positive that friedcat made other posts that he subsequently deleted, at least one in direct response to my post. It must have been commercially sensitive at that time.
donator
Activity: 980
Merit: 1004
felonious vagrancy, personified

(H*m-12/s)

I think you mean 10-12*H*m/s

You're quite right.  Thanks for pointing this out.
donator
Activity: 980
Merit: 1004
felonious vagrancy, personified
Edit: Sorry, i missed the cube. You are right.
its (H/s / m^2) * m^3


No worries, man.  I've made a ton of these mistakes too…
donator
Activity: 980
Merit: 1004
felonious vagrancy, personified
I gave you already the link to the thread with posted photos of the hashing module.

Avalon advertised 3-module 66Ghash/s and 4-module 88Ghash/s device. The picture clearly shows that each module has 80 QFN chips. What else is missing?

What's missing is enough of my free time to dig through a 42-page thread.


Anytime I see PhD-level personnel unable or unwilling to do GED-level arithmetic problem

Calm down dude.
donator
Activity: 980
Merit: 1004
felonious vagrancy, personified

Thanks, you're right.  The current BFL numbers were calculated before they got their chips back, using the 7.5GH/s/chip they were quoting at the time.  I have updated their numbers.  Thanks!

Edit: this puts bitfury back on top by a hair.  I think it's really interesting how close the numbers for the three different first-gen custom chips are (BFL, bitfury, and Avalon) despite a wide range of fabrication processes -- especially compared to the huge difference between them and the FPGAs/GPUs.  I think that partially validates the hash-meters/sec metric.
legendary
Activity: 2128
Merit: 1073
That's weird, I wonder if he edited his post, the very next one is a post by me complaining that he posted the packaged size instead of the die size (in Oct 2012).
The original post date is 2012-10-24, with last edit on 2012-12-22. The code block with the process data is quoted exactly on 2012-12-13.
Quite possible!  I can't keep up with the tangled mess of threads this forum has become…  Case in point, I cannot find Avalon's statement on the hashrate per chip.  If you can post a link to that I'll add them.
I gave you already the link to the thread with posted photos of the hashing module.

Avalon advertised 3-module 66Ghash/s and 4-module 88Ghash/s device. The picture clearly shows that each module has 80 QFN chips. What else is missing?

I'm somewhat experienced with human factors in the technology education and businesses. Anytime I see PhD-level personnel unable or unwilling to do GED-level arithmetic problem there's always an interesting human story behind that situation. I can't stop wondering what is the story here.

Or maybe it is just my sense of humour failing?
member
Activity: 76
Merit: 10
That information was available since last year.

Quite possible!  I can't keep up with the tangled mess of threads this forum has become…  Case in point, I cannot find Avalon's statement on the hashrate per chip.  If you can post a link to that I'll add them.

I found a bunch of random third-party sites tossing around the figure of 282 (MH/s)/chip.  If somebody can post a link to someplace where Avalon or one of their employees verifies this, I can finish adding them.  Either hashrate per chip or hashrate for a specific product along with the number of chips in the product (which is the other number that's way too hard to find…)

At 282 (MH/s)/chip they would be η=2,909 slightly better than bifury but still behind BFL.
I think BFL numbers should be counted with 4GH/s per chip: https://products.butterflylabs.com/homepage-subproducts/65nm-asic-bitcoin-mining-chip.html
member
Activity: 94
Merit: 10
hero member
Activity: 938
Merit: 500
https://youengine.io/
The way you describe it its not "hash meters per second", its "hash per metersecond".

In post #1: "divide by area and then multiply with length":
Quote
This is calculated by dividing the hashrate (in H/s) by the die area in square meters and then multiplying by the cube of the process's feature size in meters

(H/s / m^2) * m

= H/(s*m)

NOT Hm/s


Edit: Sorry, i missed the cube. You are right.
its (H/s / m^2) * m^3
donator
Activity: 980
Merit: 1004
felonious vagrancy, personified
Holy insteresting. Watching. Can you add AVALON  and ASICMINER?

Sure, as soon as they post their die size, process node, and hashrate per chip.
donator
Activity: 980
Merit: 1004
felonious vagrancy, personified
That information was available since last year.

Quite possible!  I can't keep up with the tangled mess of threads this forum has become…  Case in point, I cannot find Avalon's statement on the hashrate per chip.  If you can post a link to that I'll add them.

I found a bunch of random third-party sites tossing around the figure of 282 (MH/s)/chip.  If somebody can post a link to someplace where Avalon or one of their employees verifies this, I can finish adding them.  Either hashrate per chip or hashrate for a specific product along with the number of chips in the product (which is the other number that's way too hard to find…)

At 282 (MH/s)/chip they would be η=2,909 slightly better than bifury but still behind BFL.
donator
Activity: 980
Merit: 1004
felonious vagrancy, personified
(21-Jun) Oh my, this is terribly embarrassing.  When calculating the η-factor for bitfury last night I used the gate length instead of the feature size.  I have corrected this; please see above.  No wonder his numbers came out so high.

Any additional checking of my arithmetic would be welcome.
donator
Activity: 980
Merit: 1004
felonious vagrancy, personified
That information was available since last year.

Quite possible!  I can't keep up with the tangled mess of threads this forum has become…  Case in point, I cannot find Avalon's statement on the hashrate per chip.  If you can post a link to that I'll add them.



That's weird, I wonder if he edited his post, the very next one is a post by me complaining that he posted the packaged size instead of the die size (in Oct 2012).
legendary
Activity: 2128
Merit: 1073
Avalon chip count and power usage are available. You can now update your comparison table.

Thanks, but I need the actual die measurements, not the number of chips-per-wafer.

Please let me know if/when they are posted by either the Avalon manufacturers (I'll take their word for it) or some third party (must include a photo).

That information was available since last year.

https://bitcointalksearch.org/topic/m.1294431

Quote from: Bitsyncom
Code:
TSMC
TMEM91
================================================
Chip Size :   X = 3.9760 ,Y = 4.0560 mm
Reticle Size :   X/cell =  3 ,Y/cell =  3
Offset Value :   X = -3.7668 ,Y = -2.2990 mm
Alignment Mark :   (118.80,83.20),(-118.80,-83.20)
Alignment Mark Tolerant Distance :      1.6 mm
Notch Reserved Distance :   7.75 mm
Start Distance :   7.75 mm
Ring Edge :   3.0 mm
Photo Die Number:    4055
legendary
Activity: 1498
Merit: 1000
Holy insteresting. Watching. Can you add AVALON and ASICMINER?
donator
Activity: 980
Merit: 1004
felonious vagrancy, personified
Updated with Bitfury numbers.
donator
Activity: 980
Merit: 1004
felonious vagrancy, personified
Avalon chip count and power usage are available. You can now update your comparison table.

Thanks, but I need the actual die measurements, not the number of chips-per-wafer.

Please let me know if/when they are posted by either the Avalon manufacturers (I'll take their word for it) or some third party (must include a photo).
legendary
Activity: 2128
Merit: 1073
Paging Mr eldentyrell!

Avalon chip count and power usage are available. You can now update your comparison table.

chip count:

https://bitcointalksearch.org/topic/avalon-chip-141300

chip power:

https://bitcointalksearch.org/topic/m.1497127

Thanks.
sr. member
Activity: 337
Merit: 252
donator
Activity: 980
Merit: 1004
felonious vagrancy, personified
A moment of silence, please, for the XC6LX150 pictured below.  He gave his life (and his 224MH/s -- slowest chip in the cluster) in the name of science:







Apologies for the low-tech measuring equipment and misaligned ruler.

It turns out that my estimate of the size of the Spartan-6 was an overestimate by more than a factor of 2!  The die itself is 10mm on one side and between 11mm and 12mm on the other side.  Let's call it 10x12 = 120mm2.  I've updated the η-factors for all the Spartan-6 bitstreams; these are now final numbers using actual measurements (not estimates) for all of the parameters.

PS: this means that Xilinx's "CS" package, which is suppose to stand for "Chip Scale" is not actually a Chip Scale Package.  I had assumed it was.
Pages:
Jump to: