Topic: [SCAM] Foxminers? - page 5. (Read 26932 times)

I avoid this type of argumentation (back-end, physical) not because it is inherently bad. I avoid it because historically in the Bitcoin milieu most bullshit was using this type of argumentation. Some of it was intentional, profit-motivated bullshit meant to deceive. Some of it was plain dumbassery and fanboism with no actual ill intentions, just mostly lack of introspection and inquisitiveness. The profit-motivated bullshit has now shifted to other crypto-coins with various discussions of "ASIC-proof", "memory-hard", "branch-heavy" and other post-Bitcoin bullshit.

The reality of year 2017 is that it takes about $99 (for Digilent Arty FPGA experimenter board) and about month's worth of free evenings to learn and understand all the requited basics of crypto-coin mining. For Bitcoin the heydays of profitable FPGA mining are over, but all the technical concepts are still valid. All the required software (and knowledge) are either open-source or available for free from the FPGA vendor under chip-lock license. It clearly isn't a replacement for a full graduate degree in a related engineering discipline. But it is more than sufficient to quickly and clearly recognize bullshitters posting here and in other venues.

And that ^^ being right to the main point of why no 'new' way to hash faster is going to be seen soon is why I deferred to 2112. Only so many ways to skin a cat in hardware when it serves one and only one purpose.

I am not involved in the architecture design and strictly follow the node-size tech eg physical construction of the gates vs implementing actual circuits to explains 'why's' as part of the voodoo I do. My part comes in making it possible to efficiently pull the heat from the dies, Specifically making the systems that micro-machine vias into ceramic interposer/heat spreaders the dies get attached to as part of their packaging to become 'chips'.

Sure you can shrink gate sizes to pack more gates in. CPU, phone baseband chips, network fabric switches and such have the luxury of a bigger physical die size footprint to accommodate the plethora of connections also resulting in lower power-density from more area to spread out the heat/attach heat sink or other thermal route to. Mining ASICS -- sure can fit in more cores but methinks they are already at the point of diminishing return for packing density vs power needed to feed the die. That is why these are so bloody hot. With the BM1387 chips reporting die temps of 95C to 110C as 'normal, God knows what the real junction temps are.

 For Global Foundrys, there is also the "by terms of contract" amount of their foundry capacity that IBM and AMD have first call on, dating back to when IBM and AMD spun off their foundry operations into what became Global Foundrys.
IBM and AMD have absolute first call on a certain amount of foundry capacity (they also have a REQUIREMENT to use a certain amount of capacity as a minimum) that GF can NOT avoid without incurring some rather large contractual penalties (I believe there is an "acts of god" provision in those contracts however).

You may not like my answer, but I will be short and frank.

The primary reason has of your inability to understand has nothing to do with old age, not following the recent trends, etc.

You've simply received a horrible education and know nothing about the digital technology advances from made in the middle of 1950 decade.

You seem to only be aware of https://en.wikipedia.org/wiki/Von_Neumann_architecture first published in 1945 and you seem to try to translate everything into it, even if clearly the implementation uses different conceptual model. Bitcoin mining is a perfect example of problem better handled by https://en.wikipedia.org/wiki/Mealy_machine (from 1955) or https://en.wikipedia.org/wiki/Moore_machine (from 1956). Any discussion involving concepts like: caches, branches, CPU, I/O, threads, cores, etc. only shows that the person writing it doesn't know the technological advances from the middle of the previous century. In my school these are discussed in the 2nd or 3rd semester of education, literally during couple of of first lectures in the digital logic design (both theory and lab practice)

The primary advances in the power efficiency of the Bitcoin miner were:

1) to implement it as fixed program Moore machine on an FPGA. The FPGA device is itself reprogrammable, so it is still wasteful
2) to have the same fixed program Moore machine implemented without the waste of supporting reprogramming and take advantage of the fact that Bitcoin's 2*SHA256 is essentially self-testing, so even the standard chip-testing circuitry is not required.

Personally, I see no point of discussing advanced electrical engineering stuff without understanding of the basics.

When I was in school it was a common understanding that students with absolutely no contact with any computer are doing noticeably better than students who gained experience of computers via some horrible "home computers" programmed in BASIC with plentitude of GOTOs. There was this seminal paper "GOTO Considered Harmful" written in 1968 by Edseger Dijkstra and published same year by the Communications of the ACM.

I presume that you (and other otherwise educated people) suffer from some version of the above problem: lack of proper basic education in computer architecture. Sometimes I wonder how those people graduated with any real degree (not from a degree mill). But then I have to remind myself that nowadays there are plenty of accredited, real "humanistic/psychological/human-oriented" educational institutions that do grant real degrees.

Cute: Looks like an old s1 without the RiPi on it
Don't know if you caught the edit I did: As far as 7nm goes, this is that last I have come across https://arstechnica.co.uk/gadgets/2015/07/ibm-unveils-industrys-first-7nm-chip-moving-beyond-silicon/ Do note that 'chip' is referring to an assemblage of functional test structures - not a usable logic chip. Again, is a couple years old but things have been very quiet in terms of news released by the Foundries.

Has several good links in it to other articles about wassusp

Thanks for the detailed reply NotFuzzyWarm.  I don't want to dig much deeper, this old dog just flat didn't think about the multiple cpu\core overhead at all from a hardware design perspective.  But I can certainly observe it in practice for myself when I run too many threads mining on my x-way machines, and I observed it in practice too on the high dollar midranges in my software career.  Never intentionally run a conventional general purpose machine at 100%, even if it's all your resource to use, cause you will lose performance overall, even if you have tons of memory, you're gonna swap.  The different algorithms do have some different limiting factors, but you gotta leave some cpu free to account for that.  Performance generally decreases if you don't use n-1 threads against cores.  Bunch of cpus with buncha cores, that performance penalty would seem to increase the more cpus\cores you jammed in.  

In general software performance, my favorite zen answer for folks wanting to increase performance and asking me how was 'access less data'.  That would almost never work in this crypticverse if your code is very tight already, pretty much foiled by required algorithm work.  I studied Cryptonight and Wolf0's Monero code for cpu mining for quite a while before understanding I was never gonna get more than a ~2% performance increase with software changes, the only way I even got ~2% was native compiles with an optimization flag.

I get it good enough now, I don't want or need to understand it top to bottom.  Perfect is the enemy of good.  

Maybe now that I'm a Jr member or whatever I can embed my joke picture from a couple weeks ago.

Mining on a phone.

http://i.imgur.com/FhRz1pq.jpg

That is a lot harder question than you may think as there are several layers to it... For one, no one else has anything approaching what they claim. The world of crypto ASIC design is very very small and frankly no one does anything without the others working along the same lines and being rather vocal about it. Since when it comes to the Next Wonder Miner all we hear from real makers is crickets, well....

On the physical construction and layout of an ASIC I have to defer to a member here with the handle 2112 who is/was an instructor in chip design. You might want to PM them about it. A couple papers on 16/14nm tech http://www.techdesignforums.com/practice/guides/14nm-16nm-processes/ and from 2013 http://www.eetimes.com/document.asp?doc_id=1280773 Somewhere I have several papers from Mentor Graphics on their toolchains for those nodes...

As far as 7nm goes, this is that last I have come across https://arstechnica.co.uk/gadgets/2015/07/ibm-unveils-industrys-first-7nm-chip-moving-beyond-silicon/ Do note that 'chip' is referring to an assemblage of functional test structures - not a usable logic chip.

To me the core issue is, how many cores will fit in a chip? Unlike CPU's, crypto ASICS are extremely simple beasts. Each has serial coms, a smattering of working memory, and a buttload of hard-wired SHA logic cores. Whereas a CPU contains many different circuits for several kinds of IO, along with cache and math, together with the actual few to handful of CPU cores. The latest Intel Xeon has what, 12 physical cores in it? As I recall, Bitmains BM1387 chip used in the R4, s9 and T9 have 250 cores in them, the s9 uses 189 of those chips. In a way GPU chips are similar (high core count) but rather like FPGA their operations can be changed via programming but that ability again leads to speed and power penalties.

Since Bitmain has not released a data sheet for that chip, here is the specs for their last 28nm chip used in the S7 miner https://shop.bitmain.com/files/download/BM1385_Datasheet_v2.0.pdf to poke through. Much of it should still apply to their current 16nm chip

That simplicity does have a down side: Power density. Miner design moved away from large monolithic chips because it is very difficult to power and cool a chip which size-wise *could* these days hold several thousand cores and dissipate >1,000 watts. The BFL Monarch, Hashfast Minion, and a few other failures come to mind...

On the software end, it becomes fuzzier. There 2 things come into play, Stratum which works with the pools to create work and the miner software itself. Stratum docs https://bitcointalksearch.org/topic/stratum-protocol-documentation-557866

For the miner software, talk to -ck since he wrote cgminer which is what almost all miners use. Considering even the latest miners can run on a single RasPi-3 front-end that rather says then and there that optimizing code (even more as it *is* rather mature) will have little impact.

As for the Samsung 10nm processor: Read into the link and the one from Intel. To claim the 1st-to-market moniker the Samsung is kind of a cheater: Yes the gates are around 10nm but the metalization (connections) are the same 22nm they use with their 14nm chips. Intel tends to shoot for doing the entire process smaller - not just the gates.

*Could* Bitmain be working with TSMC to make a 12nm mining ASIC? (With the same 22nm metal layers they use in their 16nm FinFET's). Sure. When it comes to boutique chips like mining ASICS Bitmain is the one company that certainly has resources to pay for it. But makes no economic sense to me for them to do it: Their BM1387 is king of the hill with no competitors and after the beating the entire industry took finally getting 16/14nm to the consumer market coupled with the still-erratic chip-to-chip performance headaches they (and Avalon, and BitFury) have to deal with there is just-no-point to do it at this time. Even if they did, there is still the problem of boutique chips being last in line for the Foundry production priorities. Just as is still the case with 16nm chips first come the folks who financed ALL of the research involved eg, Apple, AMD, Cisco, Broadcom, et al.

FB site https://www.facebook.com/Scam-waring-Foxminer-121513041746669/
sprat this scam

Simple...if it sounds too good to be true,it most always is... 

Power consumption & hashrates were way beyond anything available ATM sooooooo.....................

Kinda noobie question, I'm still on board with SCAM SCAM SCAM but I don't follow processor dev for years, and I claim no EE,  I think I get the basics of tough miniaturization issue advances on these chips at a high level.  But gen purpose Intel CPU changes sockets about every fucking 15 minutes when they release a new chip\series\generation whatever.  Excluding I'm guessing slower signal travel, higher cost, higher power consumption, mo heat, etc, due to more transistors\etc are there other reasons why can't just release a slightly bigger chip with new socket?.  They are dinky ass chips already to this guy that hasn't been in a serious computer airlocked thumbprint lock room in 15 years. Paradigm shift near miracle in microcode advance is the only other thing I can guess, but I've looked at a bunch of crypto code that seems to my eye to have the slow computation in manual optimized assembler already and uses the on chip crypto code. If anybody can help me understand why those are general reasons or not for skepticism other than all the published documentation red flags on this miner it would help me understand the 'physics' comments much better.  Back in the day it was just cpu bound or i\o bound, and with many of the crypto functions on later Intel chips I have a hard time buying I\O bound for sure.  I get 'memory hard' on L3 cache with cryptonote and such very well, but with Bitcoin and Litecoin I just can't quite get why you folks more knowledgeable of ASIC and\or CPU chip architecture can see this as a big scam so easily.  Can somebody please explain the'why' basics of the believed impossibility to me a bit better?  I've tried reading hardcore EE stuff but don't know enough to parse it.

Giassyass in advance.

What do you think now? When will the new miners be out with 10nm chips?

We need to keep this post alive! SCAM SCAM SCAM

Publish your customer service policies like that.  Puhlease.  Don't take a PR genius to make the published negative perception on customer service as minimal as possible.  Some of that can happen with no fault by user.  I've had companies replace busted products where cause is indeterminate, both as high valued customer and first time purchaser.  Goodwill is all in customer service!

https://foxminers.com/faq/


https://shop.bitmain.com/workOrderGuide.htm


It saddens be to learn that Bitmain Technologies is stealing FoxMiners's copy. 

Hadn't noticed this horseshit til today....

18. WHEN WILL THE PRODUCT BE SHIPPED?
We will arrange the shipment within 12-24 hours after full payment, you will receive it within 3-5 working days, except for pre-sale orders.
When the product has shipped we will email you with the shipping details and invoice.

Can't wait to see the "secondary" interpretation of the red...

Almost like a Rick Roll 

You liked that, eh? 

Looks like Channel 4 was met with the same response: https://www.youtube.com/watch?v=bFEoMO0pc7k

After going to brenda's address for the second time and her not answering the door I left a note. Here a week later I get a voicemail from her, here it is:

https://clyp.it/2ina4pj3

So I guess right after the scam is outed and people sent her thousands of dollars (I have a guy who told me he lost 25k) she "no longer has time for this"

She also won't return my phone calls.

The specifications are unbelievable and I mean really unbelievable. I do not think that this is legit. It has been posted multiple times before, but more opinions are of course always better.