1GH/s, 20w, $500 — Butterflylabs, is it a scam? - page 19.

gmaxwell

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Quote from: Inaba on November 26, 2011, 07:37:19 PM

The demo plan is that I will:
A) connect it to a non-routable development side of the pool, so that the box is unable to communicate with the internet. I will then let it submit shares to the pool and I will have one of the getwork servers in debug mode and I will see what is sent out and what's sent back. As I found no evidence of any wireless communications on the board, and since the computer it's connected to will not be on the internet, it won't have any way of falsifying the shares submitted.
B) I will take a unit home that evening, disassemble and take more robust pictures. I will NOT be removing any heat sinks, however.
C) I will do further testing that evening on my own with a packet analyzer to see what packets are being transmitted, when and where they are going and coming from.
That's the plan as of right now, at any rate.

Please make sure at some point during the actual mining you run it on a power meter so you can get a measurement under actual mining load.

There are various ways to fake this sort of thing and match one of {rate,power} but not both. (e.g. you could use a big-fast-expensive FPGA to get 1GH/s, but if they did that they couldn't deliver on their advertised price)

runeks

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Quote from: makomk on November 26, 2011, 04:06:55 PM

[...] This thing looks to be seriously overdesigned! If they'd just added a cheap Ethernet PHY and port, it would have more than enough processing grunt to connect directly to a pool by itself and mine standalone with no computer.

As far as I can tell that would require a lot more software work. Like building a program for the Atmel chip that fetches work. I think this would, somewhat, be a waste of time, as this is what ckolivas has spent so much time perfecting with cgminer. Also, is there a TCP/IP implementation for this Atmel chip even? Or how'd they actually send packets with the PHY, let alone run a mining application on the board?

sadpandatech

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Quote from: Inaba on November 26, 2011, 07:37:19 PM

The demo plan is that I will:

A) connect it to a non-routable development side of the pool, so that the box is unable to communicate with the internet. I will then let it submit shares to the pool and I will have one of the getwork servers in debug mode and I will see what is sent out and what's sent back. As I found no evidence of any wireless communications on the board, and since the computer it's connected to will not be on the internet, it won't have any way of falsifying the shares submitted.

B) I will take a unit home that evening, disassemble and take more robust pictures. I will NOT be removing any heat sinks, however.

C) I will do further testing that evening on my own with a packet analyzer to see what packets are being transmitted, when and where they are going and coming from.

That's the plan as of right now, at any rate.

  A) Sounds awesome. I had not given much thought to the idea of being able to falsify shares with remote means as well as onboard. Thats pretty thorough methodology you have detailed and for thinking of such possibilities.

  B) rock on, the ones you've shown so far are not bad. They certainly give the impression that the PCB is not as cheap as one would think either. Any insight on the etched out portion?

  C) very nice to hear!

  Hopefully they toss a few units your way for your time. As excited as some are of the prospect of a review/demo it ultimatly only benefits them.. =)

   Cheers

worldinacoin

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Quote from: Inaba on November 26, 2011, 07:37:19 PM

The demo plan is that I will:

A) connect it to a non-routable development side of the pool, so that the box is unable to communicate with the internet. I will then let it submit shares to the pool and I will have one of the getwork servers in debug mode and I will see what is sent out and what's sent back. As I found no evidence of any wireless communications on the board, and since the computer it's connected to will not be on the internet, it won't have any way of falsifying the shares submitted.

B) I will take a unit home that evening, disassemble and take more robust pictures. I will NOT be removing any heat sinks, however.

C) I will do further testing that evening on my own with a packet analyzer to see what packets are being transmitted, when and where they are going and coming from.

That's the plan as of right now, at any rate.

Appreciated your efforts, waiting to see the results

.

Inaba

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The demo plan is that I will:

A) connect it to a non-routable development side of the pool, so that the box is unable to communicate with the internet. I will then let it submit shares to the pool and I will have one of the getwork servers in debug mode and I will see what is sent out and what's sent back. As I found no evidence of any wireless communications on the board, and since the computer it's connected to will not be on the internet, it won't have any way of falsifying the shares submitted.

B) I will take a unit home that evening, disassemble and take more robust pictures. I will NOT be removing any heat sinks, however.

C) I will do further testing that evening on my own with a packet analyzer to see what packets are being transmitted, when and where they are going and coming from.

That's the plan as of right now, at any rate.

bulanula

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Thank you for the updates Inaba. Hope you stay out of the "dark side" Grin

and avoid the temptation.

Looking forward to Sunday 18:00.

sadpandatech

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Quote from: Inaba on November 26, 2011, 06:38:59 PM

As I said yesterday, we'd either be doing the demo Saturday or Sunday. Right now, we have it planned for Sunday evening here in CST, probably around 18:00. I've been pretty swamped today, but tomorrow is mostly open.

Thanks for the updates. So what is the demo plan exactly? Are they coming to your place with a unit or two to demo them?

Inaba

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As I said yesterday, we'd either be doing the demo Saturday or Sunday. Right now, we have it planned for Sunday evening here in CST, probably around 18:00. I've been pretty swamped today, but tomorrow is mostly open.

sadpandatech

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Quote from: Turbor on November 26, 2011, 06:29:42 PM

wheres Inaba ?!

Ayee, maybe they kidnapped him so he couldn't reveal their evil scam. ;p Or he could have gotten a unit and is too busy drooling over it to report in.

Inabaaaa

P4man

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Quote from: DeathAndTaxes on November 26, 2011, 05:28:36 PM

Die shrink will ultimately delivery 2x the performance both per $ and per Watt. That is the whole reason for die shrinks. Grin

Per dollar, hmm you should get ~twice the transistor density, so for a given size you would get twice the performance, but thats ignoring the exponential higher fixed costs for these new process nodes. Just compare wafer prices at 65nm with 40/45nm at TSMC. Good luck getting 2x better performance per $!.

Per watt, 2x from just a shrink is more than just optimistic. In reality its always a lot less, and its not likely anything like moving to s-asic (particularly with little to no IO and RAM):

Sorry, an extra process shrink just isnt going to make up for that.

sadpandatech

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Quote from: Raoul Duke on November 26, 2011, 06:27:20 PM

Quote from: malevolent on November 26, 2011, 06:06:35 PM

Quote

Find us at

Address: 25E 12th Street
Kansas City, Missouri 64106
United States of America
Phone: 816 226 6966
Fax: 816 226 6966
e-mail: [email protected]
Skype: butterflylabs

Anyone from Kansas or around could verify this 'company'?

WTF
lol?

Hehe, what your friend Psy here meant to say was, "This has been covered to death in this thread already" and furthermore, "They have met with Inaba who lives in the area last night, also covered in this thread." ;p

Turbor

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BitMinter

wheres Inaba ?!

Raoul Duke

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Quote from: malevolent on November 26, 2011, 06:06:35 PM

Quote

Find us at

Address: 25E 12th Street
Kansas City, Missouri 64106
United States of America
Phone: 816 226 6966
Fax: 816 226 6966
e-mail: [email protected]
Skype: butterflylabs

Anyone from Kansas or around could verify this 'company'?

WTF
lol?

malevolent

legendary

Activity: 3472

Merit: 1722

Quote

Find us at

Address: 25E 12th Street
Kansas City, Missouri 64106
United States of America
Phone: 816 226 6966
Fax: 816 226 6966
e-mail: [email protected]
Skype: butterflylabs

Anyone from Kansas or around could verify this 'company'?

legolouman

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Activity: 504

Merit: 504

Decent Programmer to boot!

Not only have they not demoed a working miner. They also demoed a miner, plugged into a computer, and powered up, but not connected to the open mining software.

DeathAndTaxes

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Gerald Davis

Quote from: P4man on November 26, 2011, 04:39:25 PM

Well, lets look at the numbers we have. Right now the best FGPA board seems to be the Ztek board, right? It achieves 22 MH/W and when applying the largest volume discount for 100+ boards, 0.6 MH/$. Its based on an FGPA built on leading edge 45 process.

Lets look at BFL's numbers; 53 MH/W and 1.5 MH/$. I suspect its not even built on a leading edge process, but even if it is, thats almost 2.5x better power efficiency and 3x better cost efficiency.

A process shrink will rarely give you 50% on both metrics (I think we can agree the FPGA is by far the largest cost). So I just dont see how a 28nm FPGA could possibly close the gap with BFLs product, let alone a future s-asic built on a smaller node.

Die shrink will ultimately delivery 2x the performance both per $ and per Watt. That is the whole reason for die shrinks. Grin

People like to say Moore's law makes computers faster but that is only half the benefit. If computers had same efficiency as 8086 while you would have a 4GH 6 core chip it would require a 20KW connection to the power grid and costs tens of thousands of dollars a year to operate.

ztek board is available in bulk if someone wanted to finance it (250 unit licensed production run). So comparing a $200K+ sASIC investment to a board priced for small production is hardly equivalent. In units of 250 it is closer to 1MH/$ which makes the cost advantage less than <2:1. While implementations will vary 28nm FPGA will deliver roughly twice the performance per watt and per $ than 45nm process.

Still lets see BFL actually delivery something first.

sadpandatech

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Quote from: rph on November 26, 2011, 04:57:22 PM

There is also the small matter of BFL not actually demoing a working miner yet.

-rph

This..

Inaba, when are they going to get you a unit to actually test?

rph

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Activity: 176

Merit: 100

Quote from: P4man on November 26, 2011, 04:39:25 PM

Well, lets look at the numbers we have. Right now the best FGPA board seems to be the Ztek board, right? It achieves 22 MH/W and when applying the largest volume discount for 100+ boards, 0.6 MH/$. Its based on an FGPA built on leading edge 45 process.

Lets look at BFL's numbers; 53 MH/W and 1.5 MH/$. I suspect its not even built on a leading edge process, but even if it is, thats almost 2.5x better power efficiency and 3x better cost efficiency.

A Spartan6 miner can get within 20% of the BFL MH/$ in qty 100,
and as FPGA competition heats up and margins shrink I think that 3X gap will close quite a lot.
Suffice to say the build I am doing for myself is much, much better than 0.6MH/$.

ztex was first to market and is/was able to extract high margins for having a very
high quality working product that you can buy today. BFL seems OK with razor-thin
margins from the start. My point is just that their end-product pricing is not
accurately reflecting the true cost structure of 45nm FPGAs vs 40nm HC.

There is also the small matter of BFL not actually demoing a working miner yet.

-rph

P4man

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Quote from: rph on November 26, 2011, 04:24:23 PM

There is marketing, and then there's reality. It's simply not true that 40nm HC is "very far beyond" a
28nm FPGA on a miner (or any other adder-bound) design. Download the tools and run a design through both.

I wouldnt know how, but I would love to see the results if someone could.

Quote

Given the upfront cost and loss-of-flexibility HC only makes sense if you need (or can resell) a very large #
of chips before 28nm FPGAs arrive.

Well, lets look at the numbers we have. Right now the best FGPA board seems to be the Ztek board, right? It achieves 22 MH/W and when applying the largest volume discount for 100+ boards, 0.6 MH/$. Its based on an FGPA built on leading edge 45 process.

Lets look at BFL's numbers; 53 MH/W and 1.5 MH/$. I suspect its not even built on a leading edge process, but even if it is, thats almost 2.5x better power efficiency and 3x better cost efficiency.

A process shrink will rarely give you 50% on both metrics (I think we can agree the FPGA is by far the largest cost). So I just dont see how a 28nm FPGA could possibly close the gap with BFLs product, let alone a future s-asic built on a smaller node.

rph

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Merit: 100

Quote from: P4man on November 26, 2011, 03:29:01 PM

Altera's documentation for Hardcopy suggests powersavings, die space (cost) savings and speed increases that are (very) far beyond a die shrink.

There is marketing, and then there's reality. It's simply not true that 40nm HC is "very far beyond" a
28nm FPGA on a miner (or most other adder-bound) designs. Download the tools and run a design through both.

Given the upfront cost and loss-of-flexibility HC only makes sense if you need (or can resell) a very large #
of fixed-function chips before 28nm FPGAs arrive.

-rph

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