You are right on not being able to extract the bitstream because there is nothing to extract. Unlike an FPGA which is field programmable (and thus you can steal the "program" an sASIC is mask programmable. Unless someone breaks into Altera labs or uses some xray analysis to reverse engineer the design you aren't getting the "program".
But dumping open FPA onto a hadcopy would be horrible. FPGA miner has the worst performance of all the mining bitstreams out there. Also it is optimized for 150K LUTs and Altera makes no hardcopy that small. Just dumping it on a larger chip wouldn't get you very good performance per mm^2 of die space. It would be very inefficient. Maybe you brute force some decent performance by simply getting high enough clock but you end up leaving a lot of performance potential behind.
To do it right you need to buy some high end FPGA that matches the specs of the HardCopy you intend to use. You may even want to buy multiple high end FPGA to try various designs. Then you need some smart people like rph or ztek or outside telent. Pay them to take their designs (already higher hashrates than the open FPGA project) and optimize it for the larger LUT count and more efficient routing of the higher end FPGA. Spend a couple months getting the most efficient design possible.
Only once you have a high performance FPGA design which makes the characteristics of the Hardcopy you intend to use exactly do you burn it. Contract w/ Altera and have a batch 0f 10K hardcopy sASICS burned with a mask derivted from your optimized FPGA bitstream. Maybe make the design opensource and raise money via pre-orders to pay for the mask and initial run.