Weirdly they wire brushed the markings off but left JTAG access to the chips. Boundary scan and ISE software will allow you to identify the chip. Granted it takes a little more work than visually reading the markings but still is rather trivial. There are only so many companies which make FPGAs.
They could use different JTAG pinouts though, and the reason to leave them would be to do in-house stuff like programming before shipping or upgrades/repairs etc. I am not saying that this is what they will do/have done.
Or maybe the sand off the chips just now for the first shipment or so and for the pictures to delay competition a bit. Think about it, it may actually be a few months till somebody identifies the units used (if it still takes them weeks to ship), but then it still takes a few months to develop a similar architecture, and after 6 months it's all old news anyway.
It'll take artforz like 5 minutes to identify it. He already owns like one of every FPGA ever.