Topic: [ANN] Bitfury is looking for alpha-testers of first chips! FREE MONEY HERE! - page 11. (Read 176728 times)

The 1.8V is not a reference voltage, but the supply power for the SPI I/O circuitry on each chip.

Erk - it depends on how much DYI do you want and are capable of doing. I'm not sure how familiar are you with bitfury's chip and electronics in general so let me know if I'm being too technical - I'll try to put it in a bit more general terms below:

The Bitfury chips (fortunately) are very easy to put in a chain. On the H-card that's exactly what you have - a power converter module (to get from 12V to 0.8-0.9V at high amperage) and a bunch of chained BF chips, and the card provides (through the slot connector) pins for connecting to the previous card and also to the next card (so that you can chain cards as well). So, if you have one working device that can control (at least one) BF chip you can chain another H-card after it (and another after it, etc). All you'll need to do is hook the 3 data signals (SCK/MOSI/MISO) and 1.8V reference voltage from the "control" board to your H-card, and provide 12V to the H-Card.

If you already have means to provide the 12V (e.g. not afraid to solder two thick wires on the H-Card) then I guess the rest of your question is a "control board". The M-board is one such example. It connects to the RasPI and provides the necessary voltage conversion so that it can talk to one or more H-cards. The voltage conversion is really not much of a big deal and if you have some DYI experience you could make your own (that converts from the RasPI 3.3V to the 1.8V needed for BF chips).

If you're looking for a non-RasPI solution then any other self-contained miner (like c-scape's) could possibly be used - that one has a processor, the voltage conversion part and a bunch of BF chips, so you'll have to find the last chip in the chain and if the 3 data signals are accessible wire them to your H-Card.

Another solution would be any of the USB miners. There are several such designs (like the BiFury, RedFury and mine - NanoFury). I don't know for sure the details of the other ones (although I guess it's a similar story across all of them) so I'll speak just about my design - the NanoFury NF1 device has those 3 signals available at 3 small pads (test points). So in order to use a NF1 as the "control board" you would connect 5 wires (GND/1.8V/SCK/MOSI/MISO) from the NF1 to your H-card and then cgminer (or whatever miner you use) would detect the multiple BF chips at that port and drive them all.

i would buy these if it makes sense to compared with a 16-chip board.

Is this board designed to go into the M-board like a normal H-board or do you have some other way of driving it?

The reason I ask is I am looking for some other way of driving a H-Board, I can't justify the cost of the M-board starter kit, it would kill the ROI on my 1 H-board setup I am currently looking for. I know some people were experimenting with driving a H-board directly and was wondering if you had conquered that?

Get yours right away!

Any update on october chip delivery to other vendors?

cool machine & cool board!

Any open source design file now? I'm seeking the doc based on 1 chip.

DIY pick&place machine rocks
Some day I was thinking about buying DIY 3D printer. With replaced heads it can be a CNC driller, pick&place machine, paste placer machine, molding machine and of course 3D printer. Many in one, ideal solution for a hobbyst

What do you do if you have a busted H-Board and/or extra chips?

I made a mini H-board

pix: http://imgur.com/a/5Ebiw

De-soldered chips!



Standard chipset heat sinks




Running at ~20GH/s


Not bad for my first attempt at (re)drawing a PCB =P

A few pages back I remember some folks complaining about hand placing 0402's...have a look at this cheap DIY pick and place: http://vpapanik.blogspot.com/2012/11/low-budget-manual-pick-place.html
even though I made one, I still ended up hand placing some of the 0402s because it was actually faster. but the pick and place helped a lot when you're really frustrated and hands are shaking.

It's running with R01F @ 4320 ohms (0.8492 V). It's using a TPS53353 (20A) regulator instead of the 30A (just a drop in replacement for the default TPS53355).

Quite interesting, although I have never heard of such a thing , I had been wondering why I had not seen anyone get the max rate. Is this what I am thinking just a wad of circuits coming together ? I would guess with so many cores there would be a lot of busses.


Pretty cool to be able to visualize this, keep up the great work!

So that's why for over 2.3Gh/s the number of error increases no matter what you do.
To reach 3Gh/s after errors i had to make it work on 3.4-3.5 and the number of error increases  because of collisions on the internal bus ... or i got it wrong again 

Stupid me ... i counted 765 cores, while they are 756. I guess it was too late for me to thing yesterday

In my table, there are 36 rows and 21 columns (0 also counts), and 36*21=756. The code does % 24, so you'd expect 24 columns, but colums 5-7 are skipped, so only 21 left.

AFAIK there's a "käpy" (finnish for pine-cone) in the internal bus that is limiting the chip reaching 5GH.

I am looking at the code now, but the number of rows and colums in your table is 35*20=700, in the code it seems to use 24*24=576 instead of 765 cores ... shouldn't it be 15*51 instead?

Check the chainminer sources, fix_nonce() function.

Also, the different fixups aren't distributed equally. The -0x00800000 fixup is needed half the time, no fixup a third, and - 0x00400000 in the rest of the cases. So, if you try them in that order, you'll minimize the number of hashes needed in the software. Or use the method that chainminer uses to try to guess the correct fixup from the core (doesn't always work: some cores have two different possible fixups)

I did a test on the S-HASH board. For one chip,  I marked all cores that returned a valid nonce.


The same test on another chip shows three missing rows:


The test has not run for very long, so some of the unmarked cores may still get a hit later.

Of 16 chips total, 10 have found nonces in all cores. The other 6 all have one or more missing rows at the top.

Ugh, right sorry - looked only at the numbers not the operation


Can you explain a bit more or maybe an example. Thanks