https://bitcointalksearch.org/topic/m.1497042
OP and title need to be corrected: It's closer to 100MH/s/J. It seems that Avalon uses 620w, not the 400W they've been claiming.
Topic: Best demonstrated efficiency: 1290 Mhash/Joule - page 2. (Read 20545 times)
No, Jeff did not. However Yifu quoted a very narrow range of 6.6-6.7 Watt per Ghash/s. So presumably he measured this on a real Avalon. I am sure Jeff will confirm soon.
Time to refresh this thread. Avalon demonstrated 150 Mhash/Joule. This is twice better than the second best chip, developed by Virginia Tech, achieving 73 Mhash/Joule (obviously not Bitcoin-optimized).
Did Jeff post power consumption numbers somewhere?
Time to refresh this thread. Avalon demonstrated 150 Mhash/Joule. This is twice better than the second best chip, developed by Virginia Tech, achieving 73 Mhash/Joule (obviously not Bitcoin-optimized).
Ok. Assuming 120W for the 54 Ghash/sec device, that's 450 Mhash/Joule at 90nm.
Therefore Tom's standard-cell ASIC should in theory scale to 450 / ((65**2)/(90**2)) = 863 Mhash/Joule at 65nm.
If Tom went further and made it full custom, he would need a mere extra 16% efficiency gain to match BFL's 1000 Mhash/Joule.
But I would assume that making it full custom would have a lot more potential than a +16% efficiency gain.
So it seems:
- (1) either Tom's power efficiency estimates are optimistic
- (2) or BFL's power efficiency estimates are pessimistic
- (3) or BFL's full custom design has not been that well optimized after all
- (4) or Tom's standard cell design is extremely well optimized for being standard cell tech
I would say (4) is very likely since he hired state-of-the-art ASIC design firms. Knowing he had a very well optimized implementation would also explain why he initially did not believe BFL's 1000 Mhash/s claim as he probably assumed they were using std cell tech, and 65nm std cell tech should only be capable of 863 Mhash/Joule.
Therefore Tom's standard-cell ASIC should in theory scale to 450 / ((65**2)/(90**2)) = 863 Mhash/Joule at 65nm.
If Tom went further and made it full custom, he would need a mere extra 16% efficiency gain to match BFL's 1000 Mhash/Joule.
But I would assume that making it full custom would have a lot more potential than a +16% efficiency gain.
So it seems:
- (1) either Tom's power efficiency estimates are optimistic
- (2) or BFL's power efficiency estimates are pessimistic
- (3) or BFL's full custom design has not been that well optimized after all
- (4) or Tom's standard cell design is extremely well optimized for being standard cell tech
I would say (4) is very likely since he hired state-of-the-art ASIC design firms. Knowing he had a very well optimized implementation would also explain why he initially did not believe BFL's 1000 Mhash/s claim as he probably assumed they were using std cell tech, and 65nm std cell tech should only be capable of 863 Mhash/Joule.
https://www.btcfpga.com/forum/index.php?topic=4.msg132#msg132
Quote
We are expecting the 27Gh/s units to use between 50-60 watts and the 54Gh/s units to use between 100-120 watts give or take
this is estimated data - and will not be completely correct but it gives you a ballpark and as close as an estimate as our competitor friends have on their units
this is estimated data - and will not be completely correct but it gives you a ballpark and as close as an estimate as our competitor friends have on their units
I think it was a couple days ago that he clarified he meant the 54 GH unit, and in the last day he stated more directly that the 54 GH unit should use 100-120w, and the 27 GH unit 50-60w.
The bASIC power consumption estimate from Tom "8-10 devices per 1000W PSU" is too vague to make a statement at this point... For starters he did not say if he was talking about 24Ghash/s or 57Ghash/s devices.
mrb: What are your thoughts about the bASIC line using a little less than 2x the power per GH/s of the BFL SC line? You'd expect a 90nm chip to use twice the power of a 65nm chip all else being equal, right? Then what did BFL gain by going full custom? Shouldn't the BFL be significantly more efficient than 2x?
The Block Erupter 130nm project now claims an estimate of 122 Mhash/Joule: https://bitcointalksearch.org/topic/m.1072887
This is such an improvement, that ~500 Mhash/Joule should be possible at 65nm. Combined with the fact that BFL disclosed that Jalapenos will be wall-powered, after all, I think this makes it very, very likely that BFL is developing at 65nm and not 45nm.
This is such an improvement, that ~500 Mhash/Joule should be possible at 65nm. Combined with the fact that BFL disclosed that Jalapenos will be wall-powered, after all, I think this makes it very, very likely that BFL is developing at 65nm and not 45nm.
I was right. One. More. Time. I correctly predicted 65nm and BFL confirmed it.
That has been my assumption as well, though I probably got the idea from you mrb.
The Block Erupter 130nm project now claims an estimate of 122 Mhash/Joule: https://bitcointalksearch.org/topic/m.1072887
This is such an improvement, that ~500 Mhash/Joule should be possible at 65nm. Combined with the fact that BFL disclosed that Jalapenos will be wall-powered, after all, I think this makes it very, very likely that BFL is developing at 65nm and not 45nm.
This is such an improvement, that ~500 Mhash/Joule should be possible at 65nm. Combined with the fact that BFL disclosed that Jalapenos will be wall-powered, after all, I think this makes it very, very likely that BFL is developing at 65nm and not 45nm.
I was right. One. More. Time. I correctly predicted 65nm and BFL confirmed it.
Quote
And everyone is 100% sure they aren't going to have an external power supply? A small wall wart?
Yep, it's in the prototype photo 1 USB + 1 mini USB (so you don't mix them up one presumes)
However you have also made a convenient assumption that it will utilise two usb ports to power it, allowing it to have twice as much power, for a max of 5 watts. That is abit of a stretch to assume that and why the math to me does not add up for it to do 3.5 Gh/s at 2.5W and is what I stated.
See Lethos, I was right. I correctly predicted 3 months ago that it would use 2 USB ports, and BFL confirmed it:
The Jalapeno draws it's power from two USB port connectors. Both need to be connected to achieve the full 4.5 GH/s performance. (At the users discretion, a single USB connector can be used if it has a 2nd head split off as is common for use with laptop DVD drives).
Maybe OP could be updated with ngzhang's claim of "Avalon" simulation:
https://bitcointalksearch.org/topic/m.1200284
160W for 60 Ghash/s ~ 375 Mhash/Joule
https://bitcointalksearch.org/topic/m.1200284
160W for 60 Ghash/s ~ 375 Mhash/Joule
this is only a simulation, maybe a big difference between this and the final product.
after the post-simulation, we will have a much accuracy power value.
Maybe OP could be updated with ngzhang's claim of "Avalon" simulation:
https://bitcointalksearch.org/topic/m.1200284
160W for 60 Ghash/s ~ 375 Mhash/Joule
https://bitcointalksearch.org/topic/m.1200284
160W for 60 Ghash/s ~ 375 Mhash/Joule
The Jalapeno is indeed USB powered. The alternate plug-in refered to by the CSR is the option of an alternate source of power for the heat plate.
Just what I want, EXTRA heat right on top of my electronics!
Argh. OP updated again.
The Block Erupter 130nm project now claims an estimate of 122 Mhash/Joule: https://bitcointalksearch.org/topic/m.1072887
This is such an improvement, that ~500 Mhash/Joule should be possible at 65nm. Combined with the fact that BFL disclosed that Jalapenos will be wall-powered, after all, I think this makes it very, very likely that BFL is developing at 65nm.
OP updated.
This is such an improvement, that ~500 Mhash/Joule should be possible at 65nm. Combined with the fact that BFL disclosed that Jalapenos will be wall-powered, after all, I think this makes it very, very likely that BFL is developing at 65nm.
OP updated.
The Jalapeno is indeed USB powered. The alternate plug-in refered to by the CSR is the option of an alternate source of power for the heat plate.
The Block Erupter 130nm project now claims an estimate of 122 Mhash/Joule: https://bitcointalksearch.org/topic/m.1072887
This is such an improvement, that ~500 Mhash/Joule should be possible at 65nm. Combined with the fact that BFL disclosed that Jalapenos will be wall-powered, after all, I think this makes it very, very likely that BFL is developing at 65nm and not 45nm.
OP updated.
This is such an improvement, that ~500 Mhash/Joule should be possible at 65nm. Combined with the fact that BFL disclosed that Jalapenos will be wall-powered, after all, I think this makes it very, very likely that BFL is developing at 65nm and not 45nm.
OP updated.
I read you too quickly (my bad) and thought you meant 0.5W/2.5W = 20% was the variance. I was denying this.
Yes, ±5% is quite typical for a consumer electronics power spec, and should be implied in all the numbers I quoted, and does not change my point (787 Mhash/J ±5% is still greater than 700 Mhash/J).
Yes, ±5% is quite typical for a consumer electronics power spec, and should be implied in all the numbers I quoted, and does not change my point (787 Mhash/J ±5% is still greater than 700 Mhash/J).
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