Avalon expect to sale second generation chips (55nm) late October 2013 for immediate shipping.
http://thegenesisblock.com/avalon-refunds-22000-btc-2-9m-to-asic-miner-customers/
http://thegenesisblock.com/avalon-refunds-22000-btc-2-9m-to-asic-miner-customers/
So any ideas on size of their batch?
We don't have a lot of facts to go on for Avalon v2 but:
a) We know it is 55nm compared to 110nm. Die efficiency should be 4x that of v1 Avalon.
b) It is "backwards compatible" which I interpret to be same package/pinout.
c) Avalon says late Oct which is code word for Dec and given their delays in shipping, "customs issues" I probably will put them as complete miners hashing in January 2014 or later.
d) Avalon says they won't be doing presales. That means they accept the full risk of the NRE + batch run costs (as fab will want that up front). I think this will act as a limit on # of wafers ordered.
Guestimate:
Avalon current design is a single hashing engine (1 hash per clock) running at up to 330 Mhz for 330 MH/s. The current chip is on a 110nm process and has a die size of 16.12 mm^2 which means a die efficiency of 20.5 MH/s per mm^2. A perfect die shrink would make that ~80 MH/s per mm^2. For comparison BFL is ~70 MH/s per mm^2 and Bitfury is 138 MH/s per mm^2 in efficiency. To give Avalon some margin lets say they improve die efficiency to 100 MH/s per mm^2 (improved clock speed, tweaked hashing engine). Now Avalon likely isn't going to keep a single hashing engine design as the die would be insanely small (~4mm^2 as 55nm). So it seems plausible they will take the v1 design shrink it and use the additional space to put more hashing engines running in parallel, similar to how Intel can make a 6 core chip today which has the same die size as a 130nm chip from the past. Exactly how many parallel hashing engines Avalon uses doesn't really matter because it doesn't change the die efficiency (MH/s per mm^2). A 6 HE chip is going to have 6x the throughput but take up 6x the die space. There is some overhead for controller logic and I/O but it is minimal. Bitcoin mining is an "embaressingly parallel problem". My hypothesis is that since time is short, Avalon isn't looking for a redesign from scratch but rather they will take the v1 hashing engine (possibly with some minor tweaks/improvements and higher clock speed), shrink it to 55nm and then use as many in parallel which will keep the die size small enough to fit their existing package. My guess is that would be 4 to 6 making the nominal output per chip 2GH/s to 3 GH/s.
A 300mm wafer has an area of 70,685 mm^2, lets assume 80 MH/s per mm^2 with a 10% drop due to wasted space (squares inside a circle). That comes out to ~6.5 TH/s per wafer. There are more accurate methods of calculating number of full dies but it requires knowing the exact dimensions of the chip but 90% effective is a good enough guesstimate. If they get 95% yield that would be ~6TH/s usable chips per wafer. Standard batch is 50 wafers so we are looking at 300 TH/s per batch. Now they can order as large of a run as they want but given they have to front this cost/risk and with uncertainty on demand/pricing I could see them going with 2 batches (100 wafers) or 600 TH/s. Avalon should have the resources to do that ($1M @ $10K nominal per wafer plus NRE). While they could prepay for more that would be taking a big risk (no pre-orders to dump the risk on the customer). They can always purchase more wafers at a later start is their is enough demand for follow on months.
So 600 TH/s in January for Avalon 55nm? What does anyone else think?
