Can you provide:
(1) a table or graph showing hash rate x power consumption x clock speed (for your board, not the chip).
(2) a picture of the back of the board showing the back side heatsink and dimensions of the board and heatsink together?
Thanks!
Interested, but I really need an answer on this...
Frequency | Hashrate | Voltage Setpoint | Board Power (W[DC]) | Efficiency (J/GH) |
925 | 704 | 0.97 | 783.0 | 1.11 |
900 | 685 | 0.95 | 727.9 | 1.06 |
875 | 666 | 0.935 | 682.5 | 1.02 |
850 | 647 | 0.92 | 636.0 | 0.98 |
825 | 628 | 0.91 | 598.4 | 0.95 |
800 | 609 | 0.89 | 559.1 | 0.92 |
775 | 589 | 0.88 | 528.8 | 0.90 |
750 | 570 | 0.87 | 498.7 | 0.87 |
Test notes
-Single board prototype tested, not a production unit
-Power measurements are DC at the board input
-Coarse-grained voltage optimization was used, no attempt to individually optimize each die was made
For the picture of the board with the heatsink, I can't provide that yet. Next week.