Topic: [ActiveMining] The Official Active Mining Discussion Thread [Self-Moderated] - page 138. (Read 771512 times)
January 11, 2014, 12:43:19 PM
That Ken hasn't shown any chips implies that there either have not been any chips or there are chips and Ken & Co. want us to believe there are no chips. If there haven't been any chips there are three things that can be said: it is unlikely that eASIC is to blame; Ken could not have merely flubbed the design and we received gimped chips because he could still show a picture; that Ken has not yet submitted a satisfactory RTL.
January 11, 2014, 12:41:35 PM
Offering credence to people as an afterthought is lame at best. Either challenge and support yourself of don't.
All you've got as a fallback is throwing judgemental observation. He is an old alcoholic, right?.
All you've got as a fallback is throwing judgemental observation. He is an old alcoholic, right?.
Zumzero:
You contribute nothing to this conversation. You also make no sense.
Please stop making a pest of yourself & delete your posts.
Thx.
January 11, 2014, 12:32:49 PM
Offering credence to people as an afterthought is lame at best. Either challenge and support yourself of don't.
All you've got as a fallback is throwing judgemental observation. He is an old alcoholic, right?.
All you've got as a fallback is throwing judgemental observation. He is an old alcoholic, right?.
January 11, 2014, 12:14:35 PM
That's not nearly enough to compete with today's mining ASICs.
Thats a very general number and FWIW, applies to a 10 year old process without even mentioning what FPGA they are comparing to. Performance improvements from FPGA to structured asic or even asic ranges enormously depending on application. Ive seen numbers from 2x to 100x, so I wouldnt read much in to that. 16 GH per chip is what they claim, as well as ~1GH/J, Im sure eASIC didnt just come up with those numbers based on nothing. What remains to be seen is how big that chip is, but to be economically unprofitable in the coming months, it would have to be frigging huge. Considering the stated power efficiency, that seems unlikely.
Anyway, at this point I cant draw conclusions. If my assumption is correct, then it all depends on how fast eASIC can make nextreme 3 work and produce these wafers. That could be weeks or months from here, I have no idea. Ken probably does have an idea, but Im sure he is not allowed to talk. Whats left is waiting I guess.
Well sure, a hypothetical could explain away almost everything. But we can't both say that the numbers in the publicity blurb are meaningless, and then use those numbers as the basis of our assumptions. Also, why assume that the numbers in the press release (also done by marketing) are any more credible?
Either these people know their numbers, or they don't. If their projections are realistic, and Ken has truthfully passed them on, where are these first-to-market 16GH chips?
Obviously either eAsic or Ken fudged the numbers. If eAsic, that's regrettable, but why has not Ken mentioned the blown projections until a week before shipping deadline?
I realise that you are arguing a hypothetical, and that's fine. The problems creep in when the rubber meets the road, when you factor in all the lies and half-truths made by Ken & Co., when there is exactly zero evidence of any work having been done, when the promised weekly announcements focus on predictions that Bitcoin price will be $10,000, when you read the horrendous grammar and language mangling by the CEO, when you consider that the stock, promised to be tradable a month ago, is still not tradable... An unpleasant picture emerges.
January 11, 2014, 11:59:31 AM
...The CEO can hire in good faith, with supporting references, and still be let down.
He added two benches to his empty warehouse.
Stellar.
@bitwhizz: Sorry.
Sorry of I'm dragging this out. I'll stop now, but I have to say, 'EVERYONE here was reading the exchange between these two guys and we were ALL being patient and simply observing. To respond the way Thumper did, kind of let EVERYONE down as although we were expecting that reaction from crumbs but were willing it not to happen.
I've said my piece now. It's cool. Sry.
*editz*
“The lengthy time to design a cell-based ASIC has likely impacted the number of new chips even more than the much-publicized multi-million dollar expense,” said Jordan Selburn, Semiconductor Analyst with iSuppli Corporation. “Techniques such as direct-write e-Beam can dramatically reduce this time-to-design by allowing engineers to explore multiple design iterations in parallel rather than the current cumbersome and inefficient parallel approach.”
January 11, 2014, 11:49:17 AM
Kens Linkedin has an endorsement from the sales director of Stilwell Baker Inc... I guess we're reasonably confident these were the first PCB engineers then? I thought they were super reliable?
It makes no sense that Stilwell baker would screw up, they handle projects much more complex than this. However one day when Ken tells the story I am ready for many surprises.
January 11, 2014, 11:45:26 AM
That's not nearly enough to compete with today's mining ASICs.
Thats a very general number and FWIW, applies to a 10 year old process without even mentioning what FPGA they are comparing to. Performance improvements from FPGA to structured asic or even asic ranges enormously depending on application. Ive seen numbers from 2x to 100x, so I wouldnt read much in to that. 16 GH per chip is what they claim, as well as ~1GH/J, Im sure eASIC didnt just come up with those numbers based on nothing. What remains to be seen is how big that chip is, but to be economically unprofitable in the coming months, it would have to be frigging huge. Considering the stated power efficiency, that seems unlikely.
Anyway, at this point I cant draw conclusions. If my assumption is correct, then it all depends on how fast eASIC can make nextreme 3 work and produce these wafers. That could be weeks or months from here, I have no idea. Ken probably does have an idea, but Im sure he is not allowed to talk. Whats left is waiting I guess.
January 11, 2014, 11:31:29 AM
...The CEO can hire in good faith, with supporting references, and still be let down.
He added two benches to his empty warehouse.
Stellar.
@bitwhizz: Sorry.
Totally backed into a corner therefore this response was inevitable and sadly telling.
Edit: I'm not particularly delighted it turned out this way, but please read that thread I posted. Crumbs is having a conversation with the mods and goes by the moniker AccountUnlimited as one side of his many faces. There is nothing new in that, but what is good is that the mods allow such freedom of speech. The website even prepares us for this when they talk about not censoring scams. That allows me my freedom to say this, "Today Crumbs has shown his cards. He tripped and fell down our rabbit hole. He is so knowledgeable in all things ASIC that his basement dwelling, cat loving persona does not fly anymore, not here."
January 11, 2014, 11:27:33 AM
An understatement at best. 
Now watch crumbs flame for his life..
Now watch crumbs flame for his life..
January 11, 2014, 11:24:37 AM
Then why oh why perpetuate the myth that all is lost?
Edit: It would appear that crumbs has also shaken off his nemesis and used X as an escape mechanism.
I refer you all to; https://bitcointalksearch.org/topic/crumbs-hashfast-and-ban-405950
Edit: It would appear that crumbs has also shaken off his nemesis and used X as an escape mechanism.
I refer you all to; https://bitcointalksearch.org/topic/crumbs-hashfast-and-ban-405950
There is atleast one posted on this thread that is being paid to cause shit... It's proving to be very effective.
January 11, 2014, 11:18:18 AM
Then why oh why perpetuate the myth that all is lost?
Edit: It would appear that crumbs has also shaken off his nemesis and used X as an escape mechanism.
I refer you all to; https://bitcointalksearch.org/topic/crumbs-hashfast-and-ban-405950
"A man of many words perhaps has an equal number of profiles?"
Edit: It would appear that crumbs has also shaken off his nemesis and used X as an escape mechanism.
I refer you all to; https://bitcointalksearch.org/topic/crumbs-hashfast-and-ban-405950
"A man of many words perhaps has an equal number of profiles?"
January 11, 2014, 11:08:43 AM
can someone tell me whats going , i have stock. and havnt followed up in months, a quick breakdown of events would be nice
The chips and boards are delayed. Estimates 4-8wks.
We are awaiting implementation of a new trading platform - probably Coloured Coins and/or Crypto-Trade.
That's it.
January 11, 2014, 11:04:14 AM
can someone tell me whats going , i have stock. and havnt followed up in months, a quick breakdown of events would be nice
The chips and boards are delayed. Estimates 4-8wks.
We are awaiting implementation of a new trading platform - probably Coloured Coins and/or Crypto-Trade.
That's it.
January 11, 2014, 11:01:14 AM
can someone tell me whats going , i have stock. and havnt followed up in months, a quick breakdown of events would be nice
You will never get your stock back, you are a perpetual bag-holder. You should have sold your stock prior to the share transfer if you ever wanted to see your bitcoins again. January 11, 2014, 10:59:05 AM
...The CEO can hire in good faith, with supporting references, and still be let down.
He added two benches to his empty warehouse.
Stellar.
@bitwhizz: Sorry.
January 11, 2014, 10:57:30 AM
Wow Puppet, thank you so much for chiming in. Finally someone who brings both chip knowledge and common sense to this thread.
Im hardly an expert, but Ive considered the structured asic approach for a long time myself. It made complete sense a year ago, since it allows close to asic performance with comparatively low NRE, much lower risk and in theory (on an established process), much faster time to market. However, if its true ActM collected $10M, that choice becomes more questionable. And for sure the clock is ticking, the disadvantages of a structured asic cant be ignored in the face of mounting competition; they are less power efficient (color me skeptical about the claims made in that regard) and they cost a lot more per chip. IF its going to happen it had better happen soon, because obsolesce is looming around the corner.
Don't forget about the easicopy ASIC migration (which seems like an obvious next step assuming it's ready for nextreme 3):
Quote
When initial customer successes transition to very high volume production, easicopy ASICs provide OEMs the choice to further reduce cost, power consumption and increase performance via a cell-based ASIC migration.
January 11, 2014, 10:47:27 AM
can someone tell me whats going , i have stock. and havnt followed up in months, a quick breakdown of events would be nice
January 11, 2014, 10:40:59 AM
If it was done ages ago, and "It uses standard partially processed wafers on which just one layer is changed, and this can be done using an e-Beam; that would be done in house and could be done very fast (within hours literally I believe, but lets call it days)." why did the respin not happen ages ago? This is getting a bit forced.
Obviously e-beam is very much slower than traditional lithography, see my comment above. You are also making unreasonable assumptions about nextreme 3 which, according to you, is still in development.
Obviously e-beam is very much slower than traditional lithography, see my comment above. You are also making unreasonable assumptions about nextreme 3 which, according to you, is still in development.
Read my edit, this explains how it works:
http://www.easic.com/easic-introduces-a-maskless-customization-approach-for/
You dont use the ebeam to etch the entire chip, only a few via's on one layer. The prefabricated wafer is a lot like an FPGA, with the ebeam burning your bitstream. But those wafers are what makes Nextreme 3 what it is, and since eASIC still not advertising that process, only their 90 and 45nm nextreme implementations, thats all the evidence I need to know its not ready yet.
Im not here to defend Ken or ActM in general, I have no opinion on the rest of his business, but I will say the strategy of going with eASIC structured asic was a good one. Even if on hindsight it appears to be causing delays.
I'm not arguing that going with eAsic was unreasonable, and i understand the e-beam process at a conceptual level (here's a pretty accessible write-up), but even eAsic's publicity blurb promises only an order of magnitude improvement over FPGAs:
"eASIC is the only company that can offer ASIC without NRE cost. Although FPGAs do not require NRE either, their per-unit cost is significantly higher than ASIC’s and their performance is lower by about an order of magnitude."
That's not nearly enough to compete with today's mining ASICs.
If the Nextreme 3 process is not ready (which I readily grant), guessing its cost, gate density & time to market is simply that - guessing. Thus far, we know nothing about the cost (Ken didn't say), gate density (NDA), while time to market is currently abysmal.
Would I have chosen to go with Nextreme 3, abandoning allegedly existing previous designs? Would I have chosen an unproven process, obviously in early stages of development, over the 90 & 45nm implementations, when time to market is such a heavily weighed variable? I can't tell you without talking with eAsic.
But then I didn't promise anyone a thing, and I didn't take any money.
January 11, 2014, 10:34:55 AM
So all the shit Ken has had to put up with on here for the past 3months could well be due to apparently reliable and reputable big name suppliers and contractors letting him (and us) down. It's wouldn't surprise me. I mean it looks like Ken has 'hired the ''best'' to a greater or lesser extent. It's not like he is knocking these chips and boards out in his garage - he has paid others to do that work for him and paid them a lot of money it seems.
I think we need to start giving Ken the benefit of the doubt and think about who might have let us down with these delays. We can't put anyone against a wall and shoot them but atleast we can not lay all of this on Ken's shoulders. There is more involved in any businesses success than the choices made by the CEO. The CEO can hire in good faith, with supporting references, and still be let down.
I think we need to start giving Ken the benefit of the doubt and think about who might have let us down with these delays. We can't put anyone against a wall and shoot them but atleast we can not lay all of this on Ken's shoulders. There is more involved in any businesses success than the choices made by the CEO. The CEO can hire in good faith, with supporting references, and still be let down.
January 11, 2014, 10:07:10 AM
If it was done ages ago, and "It uses standard partially processed wafers on which just one layer is changed, and this can be done using an e-Beam; that would be done in house and could be done very fast (within hours literally I believe, but lets call it days)." why did the respin not happen ages ago? This is getting a bit forced.
Obviously e-beam is very much slower than traditional lithography, see my comment above. You are also making unreasonable assumptions about nextreme 3 which, according to you, is still in development.
Obviously e-beam is very much slower than traditional lithography, see my comment above. You are also making unreasonable assumptions about nextreme 3 which, according to you, is still in development.
Read my edit, this explains how it works:
http://www.easic.com/easic-introduces-a-maskless-customization-approach-for/
You dont use the ebeam to etch the entire chip, only a few via's on one layer. The prefabricated wafer is a lot like an FPGA, with the ebeam burning your bitstream. But those wafers are what makes Nextreme 3 what it is, and since eASIC still not advertising that process, only their 90 and 45nm nextreme implementations, thats all the evidence I need to know its not ready yet.
Im not here to defend Ken or ActM in general, I have no opinion on the rest of his business, but I will say the strategy of going with eASIC structured asic was a good one. Even if on hindsight it appears to be causing delays.
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