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Topic: [ANN][BLC] Blakecoin Blake-256 for GPU/FPGA With Merged Mined Pools Stable Net - page 129. (Read 409641 times)

sr. member
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kr105 has finished maintenance on www.blakecoinpool.org and looks like it is working great  Grin

thats great, we will need more pools to support the recent increase in miners
legendary
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Solutions Architect
kr105 has finished maintenance on www.blakecoinpool.org and looks like it is working great  Grin
sr. member
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hey guys,
ahh... i can't see the first page of this threat
is it just me or ...?

it is just you.
ok, thanks
full member
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BitCoin
hey guys,
ahh... i can't see the first page of this threat
is it just me or ...?

it is just you.
sr. member
Activity: 322
Merit: 250
hey guys,
ahh... i can't see the first page of this threat
is it just me or ...?
hero member
Activity: 493
Merit: 500
Hooray for non-equilibrium thermodynamics!
I think the real question is why you'd want to run fanless, if a large and slow fan would be practically inaudible, and improve the speed considerably. Since you have a big heatsink, I assume you've also gotten rid of the tiny, whiny stock fans. (Why anyone would install them in the first place is beyond me - a single 80..120 mm fan would cover all 4 FPGAs quite ideally, keeping the high pressure center away from the heatsinks.)

Agreed. I used a single 120mm fan balanced centrally over the four individual heatsinks on the ztex and this worked perfectly well. The heatsinks ran at only 35C (for 20C ambient).

Did the same here. It doesn't have to be a hurricane to keep these things cool and 120mm fans fit nicely over the ztex boards.
sr. member
Activity: 384
Merit: 250
I think the real question is why you'd want to run fanless, if a large and slow fan would be practically inaudible, and improve the speed considerably. Since you have a big heatsink, I assume you've also gotten rid of the tiny, whiny stock fans. (Why anyone would install them in the first place is beyond me - a single 80..120 mm fan would cover all 4 FPGAs quite ideally, keeping the high pressure center away from the heatsinks.)

Agreed. I used a single 120mm fan balanced centrally over the four individual heatsinks on the ztex and this worked perfectly well. The heatsinks ran at only 35C (for 20C ambient).
sr. member
Activity: 520
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555
@kramble I'm thinking of running my FPGAs without fan. I have a big heatsink on them, at which frequency would the theoretical heat be ok for long duration hashing without damaging the Spartan-6 chips?

At 172MHz they don't seem to produce that much heat...

Also you may find you can achieve a faster clock speed if you run the device cooler (silicon generally gives better performance at lower temperatures), so its up to you to decide the acceptable trade-off between perhaps a lower clock speed with no fan cooling, and a higher clock speed with a fan (and its associated noise).

I think the real question is why you'd want to run fanless, if a large and slow fan would be practically inaudible, and improve the speed considerably. Since you have a big heatsink, I assume you've also gotten rid of the tiny, whiny stock fans. (Why anyone would install them in the first place is beyond me - a single 80..120 mm fan would cover all 4 FPGAs quite ideally, keeping the high pressure center away from the heatsinks.)

I've built quiet computers with passive and nearly-passive cooling for about 10 years, starting with the same general idea: if I use a big-ass heatsink and a low-power chip, I should not need a fan. The reality is that passive cooling is rather quirky. Even the smallest forced airflow makes a huge difference. It can be hard to get a good natural convection even with chimney-style setups, because the healthy temperatures for chips are so low.
sr. member
Activity: 384
Merit: 250
@kramble I'm thinking of running my FPGAs without fan. I have a big heatsink on them, at which frequency would the theoretical heat be ok for long duration hashing without damaging the Spartan-6 chips?

At 172MHz they don't seem to produce that much heat...

I'm not a professional electronic engineer, so this is just amateur advice. Provided the heatsink is properly installed (good thermal paste and firm mechanical contact with the FPGA package), then as long as it's not too hot to touch (around 60C) you will be fine.

The professionals would use the following information to size the heatsink correctly:

The FPGA manufacturers specify a maximum operating junction temperature of 85C for commercial parts (see table 2 here), with an absolute maximum of 125C. You need to allow for the thermal resistance of the packaging here, where the important value is ΘJC (junction to case thermal resistance) at 3.7C/W for the FGG484 package and 2.2C/W for the CSG484 used in the ztex, then add the thermal resistance for the heatsink thermal paste, and the heatsink itself. This is all then multiplied by the expected power dissipation to give the temperature rise over ambient (ie the max operating temperature given in the consumer handbook for the product). Then they juggle the choice of cooling solution (heatsink+fan) so that the junction temperature stays below 85C.

The power dissipation depends on the clock frequency, and also (to some extent) the characteristics of the individual chips as manufactured, so estimating the power dissipation during the design phase is an important task (and well beyond my expertise).

Anyway, you can see why I'm not going to be able give an absolute figure, hence my "suck it and see" response above. In practice I'd just ramp the clock up until it starts giving hardware errors, then back off a bit. Then monitor the heatsink temperature to check it's not getting too hot over a period of time (the finger-test is a reasonable approximation). Be prepared to re-evaluate if the operating conditions change (eg from winter to summer).

The ztex are a bit awkward to judge the best clock speed as they seem to give hardware errors even during normal operation (probably a bug in the communication protocol, either in the driver or the FPGA code). The max clock will vary between individual devices, so the cgminer clock parameters allow each to be set individually. You should expect to achieve around 200MHz for the -3 speed grade devices (a little less for the cheaper clones using -2 speed grade). I run my lancelot at 195MHz and I was getting 220MHz for one of the devices on BlueDragon's CM1.

Also you may find you can achieve a faster clock speed if you run the device cooler (silicon generally gives better performance at lower temperatures), so its up to you to decide the acceptable trade-off between perhaps a lower clock speed with no fan cooling, and a higher clock speed with a fan (and its associated noise).

PS I did find that both the ztex 1.15y and CM1 boards I had on loan from BlueDragon did overheat if I forgot to turn the fan on (sorry Blue, no damage done though). I only noticed when the boards stated to smell hot!  (I was using a separate FAN PSU initially, all a bit Heat Robinson/Rube Goldberg as Blue didn't include the fans to save on postage costs).
hero member
Activity: 725
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@kramble I'm thinking of running my FPGAs without fan. I have a big heatsink on them, at which frequency would the theoretical heat be ok for long duration hashing without damaging the Spartan-6 chips?

At 172MHz they don't seem to produce that much heat...
hero member
Activity: 725
Merit: 503
Hop_David seems to have joined the forum just to reply to this one post Roll Eyes
Indeed. I Google for Why Not Space or Stranded Resources. When I see someone repeating Murphy's misinformation, I challenge it.
Is it because you believe in infinite growth or because you are a Trekkie?
sr. member
Activity: 274
Merit: 254
yeah that is nice to see, thanks for the block explorer dreamwatcher  Grin
legendary
Activity: 1509
Merit: 1030
Solutions Architect
Blakecoin is now on CCE.

The only ABE based explorer to be added in quite some time. Seeing as my relaunch of UFC was based on Blakecoin, I thought it appropriate to give back to the Blakecoin community.

http://blc.cryptocoinexplorer.com/

I will also be setting up a CCE3 test explorer for Blakecoin.


Blakecoin now has a CCE3 explorer:


blake.cryptocoinexplorer.com

I may be a "bit" bias, but I much prefer the CCE3 explorer for everyday use.  Grin

Awesome this really made my day thanks Grin
legendary
Activity: 1064
Merit: 1000
Blakecoin now has a CCE3 explorer:


blake.cryptocoinexplorer.com

I may be a "bit" bias, but I much prefer the CCE3 explorer for everyday use.  Grin
legendary
Activity: 1470
Merit: 1001
Use Coinbase Account almosanywhere with Shift card
Blakecoin is now on CCE.

The only ABE based explorer to be added in quite some time. Seeing as my relaunch of UFC was based on Blakecoin, I thought it appropriate to give back to the Blakecoin community.

http://blc.cryptocoinexplorer.com/

I will also be setting up a CCE3 test explorer for Blakecoin.


Nice I have been using your explorers for a while now thanks for adding this one
legendary
Activity: 1064
Merit: 1000
Blakecoin is now on CCE.

The only ABE based explorer to be added in quite some time. Seeing as my relaunch of UFC was based on Blakecoin, I thought it appropriate to give back to the Blakecoin community.

http://blc.cryptocoinexplorer.com/

I will also be setting up a CCE3 test explorer for Blakecoin.
legendary
Activity: 1509
Merit: 1030
Solutions Architect
BD we need a better explorer so we can get blc pushed onto the market lists

I have been working on a new site with integrated explorer  Cheesy

I see the current explorer is an ABE based explorer, and I am wondering why that is stopping Blake from getting on market lists. ABE is pretty much the standard block explorer framework for alt-coins.

My new design, CCE3, is not ready for full release because my priorities shifted to the SCIFI coins. In fact it is missing what most of these market lists want, an API.

Though I have refused to make or serve any new coin explorers until CCE3 is finished and all of CCE has been converted, I would be willing to make an exception for Blakecoin and serve an ABE based explorer on CCE.

This also would give Blakecoin the benefit of being grandfathered in before I change the CCE business model after the full CCE3 release and conversion.

For those not familiar with CCE:

www.cryptocoinexplorer.com

One of the CCE3 test explorers:

http://ufc.cryptocoinexplorer.com/

That would be very cool  Grin
legendary
Activity: 1064
Merit: 1000
BD we need a better explorer so we can get blc pushed onto the market lists

I have been working on a new site with integrated explorer  Cheesy

I see the current explorer is an ABE based explorer, and I am wondering why that is stopping Blake from getting on market lists. ABE is pretty much the standard block explorer framework for alt-coins.

My new design, CCE3, is not ready for full release because my priorities shifted to the SCIFI coins. In fact it is missing what most of these market lists want, an API.

Though I have refused to make or serve any new coin explorers until CCE3 is finished and all of CCE has been converted, I would be willing to make an exception for Blakecoin and serve an ABE based explorer on CCE.

This also would give Blakecoin the benefit of being grandfathered in before I change the CCE business model after the full CCE3 release and conversion.

For those not familiar with CCE:

www.cryptocoinexplorer.com

One of the CCE3 test explorers:

http://ufc.cryptocoinexplorer.com/
newbie
Activity: 2
Merit: 0

Good reference. The orbits in two body systems are conic sections: circle, ellipse, parabola, hyperbola. Within earth's neighborhood a Mars transfer orbit would be a hyperbola with regard to the earth with a focus at earth's center. But once outside the earth's neighborhood, this path would be modeled as an ellipse with the sun at a focus.

Hugely off topic here though

Well then, it was your hugely off topic post I was replying to.


, Hop_David seems to have joined the forum just to reply to this one post Roll Eyes

Indeed. I Google for Why Not Space or Stranded Resources. When I see someone repeating Murphy's misinformation, I challenge it.

... discussions on Limits To Growth do tend to become quite polarized, there seem to be almost religious attitudes on both sides of the debate.

Right. It's a complicated and important topic. There are zealots on both sides. And I admit I am not dispassionate.

I offer my math and a critique of Murphy's math. I ask people to take the time and effort to study what's going on so they can have an informed opinion.

In the case of patched conics, the speed of a hyperbola is sqrt(Vesc^2 + Vinf^2)
where Vesc is escape velocity and Vinf is the difference between earth's velocity (about 30 km/s) and perihelion velocity of a heliocentric transfer orbit. For a Mars Hohmann transfer orbit, Vinf is about 3 km/s.

When I see sqrt(a^2 + b^2) it's my habit to think of the pythagorean theorem. And that's how I visualize the speed of a hyperbola: as the hypotenuse of a right triangle with Vesc and Vinf as legs.

Thus the speed for Trans Mars Injection hyperbola would be sort(11^2 + 3^2) km/s which is about 11.4 km/s. Murphy commits a very common mistake, he just adds 11 and 3 to get 14 km/s. He also neglects aerobraking and delta V savings that can be had from 3 body mechanics. From a high school student these would be forgivable errors. From someone with Murphy's credentials, they are inexcusable.

There are many serious flaws in Murphy's arguments. I talk about them at Murphy's Mangled Math

And with that I will bow out. Out of respect for other readers I will no longer participate in the hugely off topic sub-thread Kramble has started on this forum.
legendary
Activity: 1509
Merit: 1030
Solutions Architect
BD we need a better explorer so we can get blc pushed onto the market lists

I have been working on a new site with integrated explorer  Cheesy
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