Topic: [Announcement] Avalon ASIC Development Status [Batch #1] - page 23. (Read 155339 times)

For a Chinese designers 88 would be a doubly prosperous number or joy number. Sounds likely to me...

http://en.wikipedia.org/wiki/Numbers_in_Chinese_culture#Eight

I suppose that will mean they will miss their original goal of 15-30 chips per unit, unless BFL's chips are smaller than they say, or the Avalon chips can be clocked much more aggressively, or Avalon has a much better design.

Yes. Strange, but yes.

It's not unlikely at all... depending on power factors, we estimate between 64 and 128 chips per device.  88 is an odd number (not impossible of course), but given the propensity for the Avalon team to like nice round figures, I suspect a multiple of 8.  My thoughts are they are going to have to go with more than 64 chips to overcome the particular issues they haven't run into quite yet.

You do realize that based on your calculation for a single Avalon device, which is advertised as 66Gh/sec, they would need 88 chips.
That sounds very unlikely to me...

Now that we know there will be 4055 chips per wafer, and that the die area is 16mm², I can refine my math and prediction:
- each Avalon chip will have 1/10th the number of transistors of the BFL chips (16mm² at 110nm vs. 56.25mm² at 65nm)
- BFL chips are 7.5Ghash/s, therefore Avalon chips should do 0.75Ghash/s (approximately, since the clock will be somewhat different)
- an Avalon wafer will therefore provide 4055*.75 = 3040 Ghash/s of mining power
- an Avalon wafer will go into the production of about 50 Avalon devices (~60 Ghash/s each)
- the raw cost of a wafer is $4,xxx per the partially-obscured price in the TSMC document published by the team, let's say $4500, that means $90 of wafer space per Avalon device (up from my prediction of $40)

Here's my prototype,use it free of charge,I want all to prosper with my technology 

In the spirit of Phinnaeus Gage, I found the hat:

You're a non-working dummy!    (in the current spirit of BFL interactions)

It was a non-working dummy.

I remember seeing a picture of a tin-foil hat someplace, but I think it was deleted. 

That would give out too much valuable information to other people claiming to have hats.

In the BFL tradition...  Can you please prove you have a hat?  I would like to see pictures of your working prototype hat if you do not yet have the final hat design.

I will eat my hat if Avalon hits 4.5GH/s per chip. The latest information post here shows a 4mmx4mm die, or 16mm^2. BFL's die is 7.5mmx7.5mm, or 56.25mm^2. The BFL chip is physically ~3.5x larger than Avalon. BFL is also on a 65nm node vs the 110nm of Avalon. Looking at minimum sized transistors BFL should be able to get 2.8x as many transistors in the same die area. Even say that BFL's custom design is inefficient and they can only get 2x as many transistors per mm^2 as Avalon. That still means the BFL has 7 times as many transistors per chip to work with as Avalon does. Unless BFL's design is absolute crap or Avalon is clocked way higher than BFL, they won't be that close to BFL.

As the Avalon reps previously stated that 60Gh/s itself was a very conservative value. I am going to further guess they had envisioned using less efficient chips than 7.5Gh/s and that they were using a shotgun approach of many chips to compensate for the inefficiency.

If they are actually using 4.5Gh/s chips. Then by increasing the number of chips, they increase the performance. (as well as the power use)

4.5Gh/s seems to be a conservative enough number to me. Not as high as 7.5Gh/s per chip which caused "disbelief" of competitors claims by Avalon representatives for various reasons.

Assuming 4.5 is the Avalon standard per ASIC:

2 chips =  9 Gh/s @ 5 watts per Gh/s power consumption is --> 45 watts
4 chips = 18 Gh/s @ 5 watts per Gh/s power consumption is --> 90 watts
6 chips = 27 Gh/s @ 5 watts per Gh/s power consumption is --> 135 watts
8 chips = 36 Gh/s @ 5 watts per Gh/s power consumption is --> 180 watts
10 chips = 45 Gh/s @ 5 watts per Gh/s power consumption is --> 225 watts
12 chips = 54 Gh/s @ 5 watts per Gh/s power consumption is --> 270 watts
14 chips = 63 Gh/s @ 5 watts per Gh/s power consumption is --> 315 watts
16 chips = 72 Gh/s @ 5 watts per Gh/s power consumption is --> 360 watts
18 chips = 81 Gh/s @ 5 watts per Gh/s power consumption is --> 405 watts
20 chips = 90 Gh/s @ 5 watts per Gh/s power consumption is --> 450 watts
22 chips = 99 Gh/s @ 5 watts per Gh/s power consumption is --> 495 watts
24 chips = 108 Gh/s @ 5 watts per Gh/s power consumption is --> 540 watts

If Avalon has 4055 chips per wafer and 2/3 turn out bad, then to service 300 customers they would only have about 1,350 ASICs per wafer. They would need multiple wafers (4 actually).

If each Avalon would have about 4 chips. Each would have to run at about 16.5 GH/s.

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We know it won't be that few because Avalon has already commented that they believe that their competitors claims of 7.5Gh/s per chip is "unrealistic".

So, I will revise my numbers and go on what they originally have planned in the past.

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In the past, Avalon claimed they were going to design a device with up to 15 chips. They later said that plan was out.

But assuming they originally planned for 15 chips lets do the math....

60Gh/s \ 15 = 4Gh/s per chip.

So by their original ideas at their original spec of 60Gh/s, they had planned for 4Gh/s chips.
At 4Gh per chip, they would require about 4.500 chips to fulfill their first batch (of 300). That is currently more than a single wafer holds. (Assuming 100% working chips, which is just unlikely)

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Assuming their old design used anywhere from 60 to 600 watts as one of their reps stated, the original chips had a power use of anywhere from

Best case: 1 watt per Gh/s
Worst case: 10 watts per Gh/s

Of course this is not including all the other electronics and various kinds of inefficiencies of a normal Power Supply.

Their current revision is now at 400 watts.
Which means their current guesstimate is somewhere in the neighborhood of 6 watts per Gh/s. Probably less considering all the other onboard electronics. Probably somewhere in the range of 5 watts.

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I am going to make a forecast that they are using an even number of chips rather than an odd number of chips.

So either they are probably using 12 ASICs at 5.5Gh/s each. In 2 clusters?

or 16 ASICs at 4.1 GH/s. 4 clusters?

or 24 ASICs at 2.75Gh/s. 8 Clusters?

I updated the bitcoin hardware wiki for Avalon ASIC.

Nothing new but I changed 60 -> 66 and the availability from Q2-2013 to Jan and Q1.

Have a great weekend y'all

You are talking about BFL Right?
They know their business and that is why i am sticking to them. However shit happens. But let us think positive. 

or having the whole lot fail and go bankrupt and leave everyone hanging.

That could be the case, but then they are already walking a fine line between not offering refunds until after January 1st, 2013 and offering to refund anyone who wants one because after all, they didn't use any preorder money to fund this venture.