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Topic: Butterfly Labs November Update (ASIC Chips are "flawed". Delays.) - page 4. (Read 24693 times)

hero member
Activity: 952
Merit: 1009
I hereby acknowledge tacotime as the source of all the awesomes in my new avatar.
I hereby acknowledge that you are funny.  Smiley

What's funny is this clock buffer business.  The clock tree is the most fragile and delicate part of a synchronous chip, and the hardest to troubleshoot.  I cannot imagine what made them think that this was going to make people any less concerned.


"I know! We'll just tell them something about clock buffers! There's no entry for that on Wikipedia, so they'll never know what we are talking about and people will instead acknowledge our technological prowess in awed silence. Go Go Gadget Misinformation Campaign!"
sr. member
Activity: 406
Merit: 250
LTC
I hereby acknowledge tacotime as the source of all the awesomes in my new avatar.
I hereby acknowledge that you are funny.  Smiley

What's funny is this clock buffer business.  The clock tree is the most fragile and delicate part of a synchronous chip, and the hardest to troubleshoot.

I know very well, I do this for a living.
donator
Activity: 980
Merit: 1004
felonious vagrancy, personified
I hereby acknowledge tacotime as the source of all the awesomes in my new avatar.
I hereby acknowledge that you are funny.  Smiley

What's funny is this clock buffer business.  The clock tree is the most fragile and delicate part of a synchronous chip, and the hardest to troubleshoot.  I cannot imagine what made them think that this was going to make people any less concerned.
full member
Activity: 182
Merit: 100
sr. member
Activity: 406
Merit: 250
LTC
I hereby acknowledge tacotime as the source of all the awesomes in my new avatar.
I hereby acknowledge that you are funny.  Smiley
donator
Activity: 980
Merit: 1004
felonious vagrancy, personified
chips don't exist?

add clock buffers.

I hereby acknowledge tacotime as the source of all the awesomes in my new avatar.
legendary
Activity: 1162
Merit: 1000
DiabloMiner author
Maybe someone at BFL went to the Duke Nukem Forever School of Hardware Design?

Man that sucked when it came out.

Wink

Yeah, killed one of the best jokes the video game industry ever produced. Ironically, it became one of the worst jokes shortly after.
full member
Activity: 154
Merit: 100
@ Bogart, your right. When "time is money in this game" it makes much more logical sense to spend tens of thousands of dollars for that extra 0.0009% improvement. Genius!! I think we have a Nobel Laureate candidate for economics here in Bogart.

Damage? Damage to what, BFL reputation? Half or more of the Bitcointalk community believes BFL is a scam.

BFL show's off pictures of PBC with 8 ASIC chips. Tom has his design firm redesign his ASIC offering to now have 8 ASIC chips. Monkey see, monkey do.

Do you know how magic works? It's all about misdirection.
legendary
Activity: 966
Merit: 1000
We decided to add certain clock buffers to improve noise-resistance and possibly increase frequency even further.

Sense most comments are pessimistic let me try to be optimistic by asking a question..

Is it possible that BFL is pushing their upper clock limit from 1 GHz to 1.5 GHz or even 2 GHz to squash the competition?

If that were the case, wouldn't they have just said so from the moment the delay was announced?  Instead we get some odd-sounding statement about them adding a few more nines onto their 99.999% chance of success.

And that's saying nothing of the damage caused just by any delay whatsoever, regardless of its cause.  Time is money in this game, more so than 'most anywhere else.
full member
Activity: 157
Merit: 103
This thread made me laugh like a 12 year old girl at multiple locations. Thanks for that, needed it after work today.  Grin

Edit spelling
legendary
Activity: 1890
Merit: 1003
Hi Everyone,

We've been very busy recently, unfortunately I couldn't catch up with the forums. There is a correction to be made: Chips are not and were not flawed. We decided to add certain clock buffers to improve noise-resistance and possibly increase frequency even further. The improve in noise resistance was our real goal (average frequency increase across a full wafer can be a bi-product). The decision was made to increase the near 100% chance of success even more. We'll keep you posted. If you had any questions, please let us know.


Regards,
Nasser

Okay, so 'BFL-Josh' says 'There was a flaw in the chip that needed to be addressed' .. and now there isn't? Get on the same page, people.

Thats marketing speak and damage limitation.

I read it as voltage leakage (which is, as i understand it a risk on 65nm process). Either way it means chips are not in full production yet and issues are still being ironed out.
A wise man has just spoken!
full member
Activity: 154
Merit: 100
We decided to add certain clock buffers to improve noise-resistance and possibly increase frequency even further.

Sense most comments are pessimistic let me try to be optimistic by asking a question..

Is it possible that BFL is pushing their upper clock limit from 1 GHz to 1.5 GHz or even 2 GHz to squash the competition?

full member
Activity: 133
Merit: 100
Bitcoin Enthusiast
BFL ownership may not be lily-white, but consider who is running the best scam in the world and don't lose sight of it.  Central banking has more victims than all other cons combined.  In fact, if you walk around with Federal Reserve notes in your pocket, you're considered a reserve bank. You're in signature contract with a private cartel, you've been scammed by the best. http://www.youtube.com/watch?v=DU6fxC5CXMg

Fortunately, mining and using bitcoin helps end that scam.

Great video!
full member
Activity: 143
Merit: 100
I now have even more respect for the skillful team at Enterpoint, right from the day the ASIC was announced, I remember Enterpoint team member saying that ASICs "always" end up having to go through a respin (sometimes more than one) to get it right, and that shipment before 2013 was very unlikely.

I just wish Enterpoint was too creating an ASIC.

Me Too!

Ztex also pointed out the issues with ASIC.
legendary
Activity: 1458
Merit: 1006
you may also preorder flying cars, they will be available any day now..

Any day now for 40 years: http://en.wikipedia.org/wiki/Moller_Skycar
sr. member
Activity: 327
Merit: 250
you may also preorder flying cars, they will be available any day now..
sr. member
Activity: 336
Merit: 250
I now have even more respect for the skillful team at Enterpoint, right from the day the ASIC was announced, I remember Enterpoint team member saying that ASICs "always" end up having to go through a respin (sometimes more than one) to get it right, and that shipment before 2013 was very unlikely.

I just wish Enterpoint was too creating an ASIC.
legendary
Activity: 966
Merit: 1000
How many iterations do you suppose there have been already?  Do you suppose they were all high-volume "bullet runs", each with its own full-wafer mask set?

This whole "bullet run" story Inaba/BFL_Josh told us stinks. You don't pay shitloads of money to bullet run a full lot (batch) of wafers just to figure out that your design is borked. There are always test wafers and test runs. Once your chip is OK (working prototype) you go into mass production.

Sane Conservative hardware developers don't do things that way, but maybe BFL does?

It's pretty apparent by now that BFL as a whole seems to have a bit of a "cowboy attitude", much as is shown on their public face.
hero member
Activity: 1162
Merit: 500
How many iterations do you suppose there have been already?  Do you suppose they were all high-volume "bullet runs", each with its own full-wafer mask set?

This whole "bullet run" story Inaba/BFL_Josh told us stinks. You don't pay shitloads of money to bullet run a full lot (batch) of wafers just to figure out that your design is borked. There are always test wafers and test runs first. I am sure BFL did the same.

You don't do trial and error on full lots (50 wafers) scrapping thousands of chips. That would cost you hundreds of thousands of USD. In each iteration. That's just suicide!

Once your chip is OK (working prototype) you go into mass production.

So this shipment date October November December was a lie from the beginning on!

And now you tell us your Asian fab might be a bit untrustworthy. So you might get scammed because you've chosen some backroom fab. That's suicide No.2!

Question for BFL: Why did you fuck us over on purpose with your updates/PR?
legendary
Activity: 966
Merit: 1000
Hi Everyone,

We've been very busy recently, unfortunately I couldn't catch up with the forums. There is a correction to be made: Chips are not and were not flawed. We decided to add certain clock buffers to improve noise-resistance and possibly increase frequency even further. The improve in noise resistance was our real goal (average frequency increase across a full wafer can be a bi-product). The decision was made to increase the near 100% chance of success even more. We'll keep you posted. If you had any questions, please let us know.


Regards,
Nasser

Okay, so 'BFL-Josh' says 'There was a flaw in the chip that needed to be addressed' .. and now there isn't? Get on the same page, people.

Thats marketing speak and damage limitation.

I read it as voltage leakage (which is, as i understand it a risk on 65nm process). Either way it means chips are not in full production yet and issues are still being ironed out.

IOW, a respin.

How many iterations do you suppose there have been already?  Do you suppose they were all high-volume "bullet runs", each with its own full-wafer mask set?

If it means a respin, the "week of the 11th" seems too soon, when it took 25+ days the last time.
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