Butterfly Labs November Update (ASIC Chips are "flawed". Delays.) - page 5.

Clearfly

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Quote from: MinorMiner on November 28, 2012, 04:31:07 PM

Quote from: BFL-Engineer on November 28, 2012, 09:42:08 AM

Hi Everyone,

We've been very busy recently, unfortunately I couldn't catch up with the forums. There is a correction to be made: Chips are not and were not flawed. We decided to add certain clock buffers to improve noise-resistance and possibly increase frequency even further. The improve in noise resistance was our real goal (average frequency increase across a full wafer can be a bi-product). The decision was made to increase the near 100% chance of success even more. We'll keep you posted. If you had any questions, please let us know.

Regards,
Nasser

Okay, so 'BFL-Josh' says 'There was a flaw in the chip that needed to be addressed' .. and now there isn't? Get on the same page, people.

Thats marketing speak and damage limitation.

I read it as voltage leakage (which is, as i understand it a risk on 65nm process). Either way it means chips are not in full production yet and issues are still being ironed out.

AndrewBUD

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Quote from: squeept on November 28, 2012, 05:42:59 PM

They bring it on themselves? There was just a full page of gibberish insults because they added an 'ignore' button on their forum. If they shipped tomorrow, there would be a dozen fucking threads here complaining that they shipped early.

LOL probably. Or that they didn't ship out enough units at once.

squeept

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They bring it on themselves? There was just a full page of gibberish insults because they added an 'ignore' button on their forum. If they shipped tomorrow, there would be a dozen fucking threads here complaining that they shipped early.

crazyates

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Quote from: MinorMiner on November 28, 2012, 04:44:22 PM

Quote from: crazyates on November 28, 2012, 04:40:08 PM

Quote from: MinorMiner on November 28, 2012, 04:31:07 PM

Okay, so 'BFL-Josh' says 'There was a flaw in the chip that needed to be addressed' .. and now there isn't? Get on the same page, people.

To someone like me, there's a very small difference between "Engineering oversight" and "Design flaw".

Yea.. and as someone else said, they really need to be careful about what they say. BFL people may moan that everyone is deriding them but then they bring stuff on themselves with half-assed 'press releases' that seem to only serve to stir up worry and/or confusion.

No my point is that I don't care. Those two mean almost the same thing to me.

MinorMiner

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Quote from: crazyates on November 28, 2012, 04:40:08 PM

Quote from: MinorMiner on November 28, 2012, 04:31:07 PM

Okay, so 'BFL-Josh' says 'There was a flaw in the chip that needed to be addressed' .. and now there isn't? Get on the same page, people.

To someone like me, there's a very small difference between "Engineering oversight" and "Design flaw".

Yea.. and as someone else said, they really need to be careful about what they say. BFL people may moan that everyone is deriding them but then they bring stuff on themselves with half-assed 'press releases' that seem to only serve to stir up worry and/or confusion.

crazyates

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Quote from: MinorMiner on November 28, 2012, 04:31:07 PM

Okay, so 'BFL-Josh' says 'There was a flaw in the chip that needed to be addressed' .. and now there isn't? Get on the same page, people.

To someone like me, there's a very small difference between "Engineering oversight" and "Design flaw".

MinorMiner

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Quote from: BFL-Engineer on November 28, 2012, 09:42:08 AM

Hi Everyone,

We've been very busy recently, unfortunately I couldn't catch up with the forums. There is a correction to be made: Chips are not and were not flawed. We decided to add certain clock buffers to improve noise-resistance and possibly increase frequency even further. The improve in noise resistance was our real goal (average frequency increase across a full wafer can be a bi-product). The decision was made to increase the near 100% chance of success even more. We'll keep you posted. If you had any questions, please let us know.

Regards,
Nasser

Okay, so 'BFL-Josh' says 'There was a flaw in the chip that needed to be addressed' .. and now there isn't? Get on the same page, people.

greyhawk

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Quote from: psilan on November 28, 2012, 03:56:55 PM

Quote from: greyhawk on November 28, 2012, 03:52:40 PM

Maybe someone at BFL went to the Duke Nukem Forever School of Hardware Design?

Man that sucked when it came out.

Wink

Both of them. At the same time.

Starlightbreaker

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Quote from: greyhawk on November 28, 2012, 03:52:40 PM

Maybe someone at BFL went to the Duke Nukem Forever School of Hardware Design?

or probably Valve with HL3.

but valve's a great company, unlike BFL...so i dunno.

psilan

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Quote from: greyhawk on November 28, 2012, 03:52:40 PM

Maybe someone at BFL went to the Duke Nukem Forever School of Hardware Design?

Man that sucked when it came out.

Wink

greyhawk

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Maybe someone at BFL went to the Duke Nukem Forever School of Hardware Design?

Bogart

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Quote from: BFL-Engineer on November 28, 2012, 09:42:08 AM

Hi Everyone,

We've been very busy recently, unfortunately I couldn't catch up with the forums. There is a correction to be made: Chips are not and were not flawed. We decided to add certain clock buffers to improve noise-resistance and possibly increase frequency even further. The improve in noise resistance was our real goal (average frequency increase across a full wafer can be a bi-product). The decision was made to increase the near 100% chance of success even more. We'll keep you posted. If you had any questions, please let us know.

Regards,
Nasser

You said the same thing yesterday on the BFL forums. It doesn't make any more sense when you say it again here today.

If you haz chips that are not critically flawed, Y U no ship dem?

If they don't perform up to spec, that is indeed a flaw. Yet you say there is no flaw?

Hearing things like this that don't make sense is making the flocks restless.

AndrewBUD

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Quote from: MeSarah on November 28, 2012, 01:35:04 PM

Is this the knitting circle with bitchy house wives I was looking for?

Naww.. Fat dudes with walking phobias

MeSarah

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Is this the knitting circle with bitchy house wives I was looking for?

michaelmclees

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When I asked them about this, they said they wouldn't send anyone until everything was up and running. Personally, I think this is a waste of time. It was always my opinion the visit should be to see their progress, whatever it may be. BFL seems to have the opinion that it is a waste to send anyone with a camera until their basically shipping. If that's the plan ... What's the point?

crazyates

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Quote from: PuertoLibre on November 28, 2012, 12:43:49 PM

Quote from: wormbog on November 28, 2012, 12:06:12 PM

Quote from: AndrewBUD on November 28, 2012, 11:14:33 AM

That's why I think they changed the story.

If they had a working chip they would be pushing it in everyones face... They would get more orders because their the first to show a working prototype.

But nothing but stories and delays..

Why not get the miner dev's an underclocked working prototype so we have working software for these ASIC's?

Anything they show by video will be immediately dismissed as a fake.

If they send early release devices to a few operators, everyone will be howling about how unfair it is that a few inner-circle people get to use the hardware while the difficulty is still low.

BFL needs to invite a BTC-savvy reporter in to review their pre-release hardware, someone with enough of a reputation to be widely perceived as legit.

You mean like Yochdog and Kano? Hows that going?

For those that don't know, BFL offered to fly 2 members of the community out and look at their new hardware, and confirm that they are worked as intended. In a vote on the BFL forums, Yochdog (a very trusted trader) and Kano (one of the developers of CGMiner) were chosen. Unfortunately, nothing has happened so far, and no plans have been made public.

Original thread here: https://bitcointalksearch.org/topic/bfl-requests-input-112543

CoinHoarder

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In Cryptocoins I Trust

Quote from: Syke on November 28, 2012, 12:42:45 PM

Quote from: BFL-Engineer on November 28, 2012, 09:42:08 AM

Hi Everyone,

We've been very busy recently, unfortunately I couldn't catch up with the forums. There is a correction to be made: Chips are not and were not flawed. We decided to add certain clock buffers to improve noise-resistance and possibly increase frequency even further. The improve in noise resistance was our real goal (average frequency increase across a full wafer can be a bi-product). The decision was made to increase the near 100% chance of success even more. We'll keep you posted. If you had any questions, please let us know.

Regards,
Nasser

You already have a chip with near 100% success and you postponed release so you could get even better than near 100% success? Right.

Ya... um... THIS. Roll Eyes

PuertoLibre

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Quote from: AndrewBUD on November 28, 2012, 12:48:37 PM

Kanoi said he has not heard anything.. No updates.

We should hire a resident nutjob to make like "Signs" as to when the BFL ASICs will ship. Then walk around with a sign in their Avatar.

The first sign will be when Kano and Yochdog appear at BFL.

The second sign is when BFL begins to gloat about their (actual) hardware.

The third sign, is when people receive emails to the effect that they must select their shipping service as a final check and confirmation.

Until these three are not fulfilled (he says in a Biblical tone) it shall not be!

AndrewBUD

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Kanoi said he has not heard anything.. No updates.

PuertoLibre

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Quote from: wormbog on November 28, 2012, 12:06:12 PM

Quote from: AndrewBUD on November 28, 2012, 11:14:33 AM

That's why I think they changed the story.

If they had a working chip they would be pushing it in everyones face... They would get more orders because their the first to show a working prototype.

But nothing but stories and delays..

Why not get the miner dev's an underclocked working prototype so we have working software for these ASIC's?

Anything they show by video will be immediately dismissed as a fake.

If they send early release devices to a few operators, everyone will be howling about how unfair it is that a few inner-circle people get to use the hardware while the difficulty is still low.

BFL needs to invite a BTC-savvy reporter in to review their pre-release hardware, someone with enough of a reputation to be widely perceived as legit.

You mean like Yochdog and Kano? Hows that going?

Topic: Butterfly Labs November Update (ASIC Chips are "flawed". Delays.) - page 5. (Read 24693 times)