Can someone who has received one of the 1.2 Th/s miners confirm that the heatsink on the A1 chip is only on the top (e.g., there is no heatsink on the backside of the PCB)? I ask because it is clear looking at Innosilicon specs that a majority of the heat is designed to go to the PCB side (back) and heatsinks on both back and front are *required* by spec... that could explain the meltdowns. Sorry if that was covered before.
The chips appear to be assembled properly. BUT one problem is the amount of thermal grease too much and too little and general build quality of the hardware. It seems like there is no uniformity in the build batches. one could have one voltage and another board another....so if you run cgminer on one voltage you will have a board or 4 burn out on you. So any uniform or standard setting (which in actuality was the default bitmine settings that were much higher and would cause the boards to fry almost as soon as they came online) could cause the boards to fry.
I ran into this with one miner that had 3 boards pretty much die on me in 5 minutes and then a 4th shortly and I was able to salvage a 5th onto my working miner that had one dead board....that 4th board died a couple of days later while leaving me now with 4 out of 10 working boards..at this point i am expecting them to die at some point. But knock on wood they are still working. So the design is a working design. But the build quality and general QA testing was pretty much non-existent hence the problems.
The erratic grease coverage doesn't surprise me. Bet the boards were not tightned down to the main sinks by cross-torquing the screws (and not all the way at once) to spread the grease evenly outward as best one can. Any other way and you get bubbles & dry(ish) spots. Dinna help that AMT said they were getting folks from the office to help build them. Isn't that the blind leading the blind?...
Realistically, the only areas on the main sinks that need thermal compound/grease is for the Vcore FET's and where the A1's thermal vias are. With the boards being FR4 there is minimal lateral heat flow aside from what the ground plane cladding provides. Now if Tlam or Tclad boards were used...
I've been meaning ask about the core voltages and how they are set. I take it with the current (original) design all boards are set to the same Vcore level? Or can each boards be tweaked on it's own?
With the technobit solution and seeing the sshot of BitMine's 2.4 TH it looks like each um, module, is pretty much an independent miner which hopefully means they can be tweaked one at a time.
Does cgminer allow for individual module addressing for speed/voltages?