FC, you can probably dispel a little confusion here. The MPW samples you have and are testing are not in the same package as the final chips will be in. The production chips will look significantly different than the test chips, and the board package will be different.
Is that correct?
BE200 -- QFN 8x8 or 9x9
BE300S -- FCLGA 5x5
BE300 Final Version -- FCLGA nxn (n not determined yet)
QFN in a low voltage setting introduces too much overhead, so although we wanted compatibility hard, we chose a different package.
i thought Flip Chip Land Grid Array (FCLGA), would require pins, or solder balls on the PCB, to connect to the land grid at the bottom of the package. Something like them socket'ed intel cpus, you know, they flipped the chip for the bond pads to face down, for the bond wires to be all inside the substrate.
these BE300S's still look like Quad Flat No-leads (QFN)
now Flip Chip Ball Grid Array (FCBGA), like you'd see on DDR2/3/4 ram, is what i thought the setup would be like.
..if you want exposed dies, you could follow the path of what intel does with one of their gigabit Ethernet controller chips, have the dies backside flush with the top of the substrate. or you could copy knc or cointerra and have bare dies just sitting on the substrate and held by glue.
on the note of compatibility, there was no compatibility between the BE100 and the BE200. we all like the "drop in and run" idea, but i've never seen too much backwards compatibility with packages like this. so don't kick yourself over it, make the package the way the chips need it, even if you have to go 40 pin DIP, people will work around it
... am i rambling on?
