Block Erupter Prisma (>=1.4 T/device, 0.75-0.78 W/G, <1 BTC/T, October Shipping) - page 30.

Cyper_BLC

sr. member

Activity: 490

Merit: 270

Reverse Engineer

hash rate per watt not a problem, it can be solved easly with loverclock Wink

Major problem is Block Erupter's ugly user interface named: "BE200 Jet stratum miner", rockminer solve this problem with new r4 box model but Asicminer using still oldschool ugly BlockErupter thing. Thats terrible. Now i must to ask this, anyone can try http://getminera.com/ interface ? beatiful...

or maybe they can use this:
http://www.dragino.com/products/linux-module/item/87-he.html ------ this is 15$ bitmain biggest solution.
https://github.com/dragino
like antminer s3.

i hope FriedCat answers this message.

xhomerx10

legendary

Activity: 3808

Merit: 7912

Quote from: dogie on September 27, 2014, 05:02:30 AM

Quote from: jimmothy on September 27, 2014, 04:41:22 AM

Quote from: dogie on September 27, 2014, 04:36:12 AM

Quote from: MrTeal on September 26, 2014, 05:40:43 PM

Quote from: Friedman on September 26, 2014, 05:29:03 PM

Looks like a longer tube. How did they get the efficiency up?

Downclock and downvolt each chip.

Nope. Its a new parallel powering layout which is simply more efficient. If I get a Prisma you'll be able to see it in the pictures.

That may be true but it's also underclocked. The tubes were 8.3gh/s per chip and Prisma is 7.3gh/s.

Where did you hear about this "parallel powering layout"?

Downclocking the chips by 10% doesn't result in 25% power savings. The design was first done by XBTec on their Pacifics (https://farm4.staticflickr.com/3874/14825302026_f8e55aca1f_o.jpg) which results in significantly lower power requirements by stringing the chips together. [Note their V1 didn't actually realise the power savings in the design due to other bottlenecks, but the V2 did]. This is the same 'technology' that friedcat has put on the Prisma to generate the power savings compared to the Tube.

While I respect AM and your guides Dogie, I have to respectfully disagree -

The math:
800(speed of the tube) X 240/270(ratio of clocks) X 2(ratio of chips per miner) = 1422
and because you have underclocked you can now lower the voltage resulting in some power savings.
Come on man we've all done this with our GPUs; this is nothing different or special and nothing they couldn't have done right off the hop to give AM an edge.

parallell powering layout my ASS. Who came up with this BS?

novak@gekkoscience

full member

Activity: 173

Merit: 100

Quote from: TheRealSteve on September 27, 2014, 12:28:27 PM

Quote from: novak@gekkoscience on September 27, 2014, 11:42:38 AM

Looking at the prisma image it's pretty hard to see what's going on [...] I think it's just a low quality image

Pretty much. I'm sure higher quality pictures will pop up as people get these in hand (asicminer could take some themselves, of course). Here's some different angles, but they're really not that much clearer

It does look like a lot of buffer ICs (or something) from that picture and there are certainly caps, I can't really tell what's on the other side of the chips though... I'm not certain of the exact way that these are being hooked up, but the core voltage is somewhere between 0.55 and 0.88 V, and 16 in series under 12V would be 0.75V per chip, which would be reasonable. Maybe on the other side of the chips are low power bucks to generate the correct I/O voltage for each chip (1.8V above whatever ground level is).

Interesting, at any rate.

--
novak

TheRealSteve

hero member

Activity: 686

Merit: 500

FUN > ROI

Quote from: novak@gekkoscience on September 27, 2014, 11:42:38 AM

Looking at the prisma image it's pretty hard to see what's going on [...] I think it's just a low quality image

		Pretty much. I'm sure higher quality pictures will pop up as people get these in hand (asicminer could take some themselves, of course).
		Here's some different angles, but they're really not that much clearer

novak@gekkoscience

full member

Activity: 173

Merit: 100

Quote from: dogie on September 27, 2014, 04:36:12 AM

Quote from: MrTeal on September 26, 2014, 05:40:43 PM

Quote from: Friedman on September 26, 2014, 05:29:03 PM

Looks like a longer tube. How did they get the efficiency up?

Downclock and downvolt each chip.

Nope. Its a new parallel powering layout which is simply more efficient. If I get a Prisma you'll be able to see it in the pictures.

Interesting, Dogie. I assume you have some inside information. Looking at the prisma image it's pretty hard to see what's going on, almost looks intentionally blurred over the area that previously contained the buck circuits. I think it's just a low quality image, but that particular area is pretty blurry. It looks like maybe there are a couple of ICs in the area, potentially level shifters between the BEE200 chips and the AVR for SPI communication? And I am pretty sure I do see caps in between each BE200 chip, which would make sense.

--
novak

klondike_bar

legendary

Activity: 2128

Merit: 1005

ASIC Wannabe

Quote from: dogie on September 27, 2014, 05:02:30 AM

Quote from: jimmothy on September 27, 2014, 04:41:22 AM

Quote from: dogie on September 27, 2014, 04:36:12 AM

Quote from: MrTeal on September 26, 2014, 05:40:43 PM

Quote from: Friedman on September 26, 2014, 05:29:03 PM

Looks like a longer tube. How did they get the efficiency up?

Downclock and downvolt each chip.

Nope. Its a new parallel powering layout which is simply more efficient. If I get a Prisma you'll be able to see it in the pictures.

That may be true but it's also underclocked. The tubes were 8.3gh/s per chip and Prisma is 7.3gh/s.

Where did you hear about this "parallel powering layout"?

Downclocking the chips by 10% doesn't result in 25% power savings. The design was first done by XBTec on their Pacifics (https://farm4.staticflickr.com/3874/14825302026_f8e55aca1f_o.jpg) which results in significantly lower power requirements by stringing the chips together. [Note their V1 didn't actually realise the power savings in the design due to other bottlenecks, but the V2 did]. This is the same 'technology' that friedcat has put on the Prisma to generate the power savings compared to the Tube.

is that the stringing to run them off 12V without massive losses on the DC/DC converters?

hdbuck

legendary

Activity: 1260

Merit: 1002

Quote from: dogie on September 27, 2014, 05:02:30 AM

Quote from: jimmothy on September 27, 2014, 04:41:22 AM

Quote from: dogie on September 27, 2014, 04:36:12 AM

Quote from: MrTeal on September 26, 2014, 05:40:43 PM

Quote from: Friedman on September 26, 2014, 05:29:03 PM

Looks like a longer tube. How did they get the efficiency up?

Downclock and downvolt each chip.

Nope. Its a new parallel powering layout which is simply more efficient. If I get a Prisma you'll be able to see it in the pictures.

That may be true but it's also underclocked. The tubes were 8.3gh/s per chip and Prisma is 7.3gh/s.

Where did you hear about this "parallel powering layout"?

Downclocking the chips by 10% doesn't result in 25% power savings. The design was first done by XBTec on their Pacifics (https://farm4.staticflickr.com/3874/14825302026_f8e55aca1f_o.jpg) which results in significantly lower power requirements by stringing the chips together. [Note their V1 didn't actually realise the power savings in the design due to other bottlenecks, but the V2 did]. This is the same 'technology' that friedcat has put on the Prisma to generate the power savings compared to the Tube.

is it possible to reach 2Th by overclocking say 1 chip out of 2 (and considering the chip density) or something?

dogie

legendary

Activity: 1666

Merit: 1185

dogiecoin.com

Quote from: jimmothy on September 27, 2014, 04:41:22 AM

Quote from: dogie on September 27, 2014, 04:36:12 AM

Quote from: MrTeal on September 26, 2014, 05:40:43 PM

Quote from: Friedman on September 26, 2014, 05:29:03 PM

Looks like a longer tube. How did they get the efficiency up?

Downclock and downvolt each chip.

Nope. Its a new parallel powering layout which is simply more efficient. If I get a Prisma you'll be able to see it in the pictures.

That may be true but it's also underclocked. The tubes were 8.3gh/s per chip and Prisma is 7.3gh/s.

Where did you hear about this "parallel powering layout"?

Downclocking the chips by 10% doesn't result in 25% power savings. The design was first done by XBTec on their Pacifics (https://farm4.staticflickr.com/3874/14825302026_f8e55aca1f_o.jpg) which results in significantly lower power requirements by stringing the chips together. [Note their V1 didn't actually realise the power savings in the design due to other bottlenecks, but the V2 did]. This is the same 'technology' that friedcat has put on the Prisma to generate the power savings compared to the Tube.

jimmothy

hero member

Activity: 770

Merit: 509

Quote from: dogie on September 27, 2014, 04:36:12 AM

Quote from: MrTeal on September 26, 2014, 05:40:43 PM

Quote from: Friedman on September 26, 2014, 05:29:03 PM

Looks like a longer tube. How did they get the efficiency up?

Downclock and downvolt each chip.

Nope. Its a new parallel powering layout which is simply more efficient. If I get a Prisma you'll be able to see it in the pictures.

That may be true but it's also underclocked. The tubes were 8.3gh/s per chip and Prisma is 7.3gh/s.

Where did you hear about this "parallel powering layout"?

dogie

legendary

Activity: 1666

Merit: 1185

dogiecoin.com

Quote from: MrTeal on September 26, 2014, 05:40:43 PM

Quote from: Friedman on September 26, 2014, 05:29:03 PM

Looks like a longer tube. How did they get the efficiency up?

Downclock and downvolt each chip.

Nope. Its a new parallel powering layout which is simply more efficient. If I get a Prisma you'll be able to see it in the pictures.

wasubii

sr. member

Activity: 448

Merit: 250

Quote from: Master One on September 27, 2014, 02:05:28 AM

Will AM or friedcat provide a ready-to-use Raspberry PI image?

...
Why doesn't AM or friedcat start a github repo for offering a ready-to-use image (preferably featuring a web-GUI as well) as well as the source code for their modified cgminer / USB drivers?

This!

Sort it out FC!!

Offer a bounty for a RPi image with nice web GUI - someone could fork MinePeon to work with AM tubes...

Master One

full member

Activity: 238

Merit: 100

Wanna buy a Tesla? Visit TeslaBargain.com first!

What I'd like to know:

Can a Prisma be over/under clocked/volted?
Will AM or friedcat provide a ready-to-use Raspberry PI image?

I think it's wrong that AM still sticks to those buggy ethernet controllers, they should drop that one and concentrate on providing a real controller unit. I also find it wrong that CrazyGuy only wants to offer his Raspberry PI image for use with Prisma to his customers, because it does not really make any sense that all the other AM customers should have to reinvent the wheel themselves.

Why doesn't AM or friedcat start a github repo for offering a ready-to-use image (preferably featuring a web-GUI as well) as well as the source code for their modified cgminer / USB drivers?

stompysteve

hero member

Activity: 574

Merit: 500

Quote from: yslyung on September 26, 2014, 05:35:47 PM

still no pricing yet ? pls pls pls revise !

what do you mean no pricing yet?

MrTeal

legendary

Activity: 1274

Merit: 1004

Quote from: Friedman on September 26, 2014, 05:29:03 PM

Looks like a longer tube. How did they get the efficiency up?

Downclock and downvolt each chip.

yslyung

legendary

Activity: 1500

Merit: 1002

Mine Mine Mine

still no pricing yet ? pls pls pls revise !

Friedman

newbie

Activity: 40

Merit: 0

Looks like a longer tube. How did they get the efficiency up?

TheRealSteve

hero member

Activity: 686

Merit: 500

FUN > ROI

Quote from: opentoe on September 25, 2014, 06:31:56 PM

Please, a real picture of this Prisma!

There's one a few pages back:
https://bitcointalksearch.org/topic/m.8931990
( note that I replaced that picture the other day as the original disappeared )

diwangxing

member

Activity: 60

Merit: 10

好顶赞

opentoe

legendary

Activity: 1274

Merit: 1000

Personal text my ass....

Please, a real picture of this Prisma!

klondike_bar

legendary

Activity: 2128

Merit: 1005

ASIC Wannabe

Quote from: CrazyGuy on September 25, 2014, 02:19:42 PM

Quote from: novak@gekkoscience on September 25, 2014, 01:49:48 PM

Quote from: Master One on September 25, 2014, 01:08:02 PM

Quote from: Blazed on September 25, 2014, 11:59:43 AM

Really no need to fix those controllers if we can use a Pi!!

So it's either buggy ethernet controller with uncertain fix or Raspberry PI with uncertain capability (possibly unreliable and/or underpowered) in an uncertain setup.

If there's a problem with the Pi it's going to be the driver. There's no trouble running cgminer on a Pi and the BE200 ethernet controller is much weaker than a Pi. As in, 1/4000th of the RAM space.

--
novak

I believe the issue with the RPIs are USB and ethernet bus related. The BTCGarden units ran great on an RPI but they were using GPIO.

I'm thinking the Prisma limit on RPI will probably be lower than the BE controller but we'll know soon enough. The good thing about the USB adapter is that it should be trivial to get these running on any controller you choose.

I've been told by phasebird that the adapter should be compatible with tubes as well, waiting on confirmation.

would this same USB dongle work for running S1 blades? (theres a thread dedicated to running them on an RPi)

Topic: Block Erupter Prisma (>=1.4 T/device, 0.75-0.78 W/G, <1 BTC/T, October Shipping) - page 30. (Read 108032 times)