Topic: Butterfly Labs - Bitforce Single and Mini Rig Box - page 14. (Read 186898 times)

Took exactly 3 months but I finally have mine !!

No they can't ship the massive backlog they have now in a timely manner so it will be whenever they damn well please..

Good for you 

We all know the answer...

"4-6 Weeks"

No. But why not ask [email protected]?

Has BFL gave any idea of what the lead time is going to be for new orders coming in for the singles? 

I had similar issues with cgminer. Try version 2.3.6.

Can someone please help with cgminer and 4 BFLs in windows?
https://bitcointalksearch.org/topic/need-help-with-cgminer-bfl-and-scan-serial-87116
Thank you

This does not work for me, can anyone help? I need 4 bfls in a conf file.

My change included modifying the initial detection so that both the Icarus and BFL code report the same.
i.e. attempt as DEBUG then failure as ERR
(P.S. there isn't much point posting that long code here)

"Please note:  Until we’re through initial Mini Rig shipments, you may find communications with anyone outside of customer service to be difficult.  Please be patient and reach out to Jody for the time being.  Announcements regarding abbreviated shipping schedules and future product (BitForce SC) release will be made on June 15th.  Until then we will be focusing purely on Mini Rig shipments."

http://www.butterflylabs.com/production-update/

Well they should... and in time for them to mail me mine, too!

As far as I know, BFL doesn't plan to offer those cards as Singles.

17 cards at 1.5GH/s, right? Are these improved versions going to be in rev4 of the Single?

The Mini Rig contains an improved version of the  single.

Do we know more info about this? Is the ASIC the 4th gen, or is there another FPGA Single that's going to be faster before they release the ASIC?

It looks like once again BFL lied about shipments going out.  No one has received any shipping confirmations.  I wonder what they would do if 200 or more single orders were canceled.

Here had a problem with scanhash() and disabling of BFL device.  Nothing to do with opening device.
LOG_ERR is used.

static uint64_t bitforce_scanhash(struct thr_info *thr, struct work *work, uint64_t __maybe_unused max_nonce)
{
   struct cgpu_info *bitforce = thr->cgpu;
   int fdDev = bitforce->device_fd;

   char pdevbuf[0x100];
   unsigned char ob[61] = ">>>>>>>>12345678901234567890123456789012123456789012>>>>>>>>";
   int i;
   char *pnoncebuf;
   char *s;
   uint32_t nonce;

   BFwrite(fdDev, "ZDX", 3);
   BFgets(pdevbuf, sizeof(pdevbuf), fdDev);
   if (unlikely(!pdevbuf[0])) {
      applog(LOG_ERR, "Error reading from BitForce (ZDX)");
      return 0;
   }
   if (unlikely(pdevbuf[0] != 'O' || pdevbuf[1] != 'K')) {
      applog(LOG_ERR, "BitForce ZDX reports: %s", pdevbuf);
      return 0;
   }

   memcpy(ob + 8, work->midstate, 32);
   memcpy(ob + 8 + 32, work->data + 64, 12);
   BFwrite(fdDev, ob, 60);
   if (opt_debug) {
      s = bin2hex(ob + 8, 44);
      applog(LOG_DEBUG, "BitForce block data: %s", s);
      free(s);
   }

   BFgets(pdevbuf, sizeof(pdevbuf), fdDev);
   if (unlikely(!pdevbuf[0])) {
      applog(LOG_ERR, "Error reading from BitForce (block data)");
      return 0;
   }
   if (unlikely(pdevbuf[0] != 'O' || pdevbuf[1] != 'K')) {
      applog(LOG_ERR, "BitForce block data reports: %s", pdevbuf);
      return 0;
   }

   BFwrite(fdDev, "ZLX", 3);
   BFgets(pdevbuf, sizeof(pdevbuf), fdDev);
   if (unlikely(!pdevbuf[0])) {
      applog(LOG_ERR, "Error reading from BitForce (ZKX)");
      return 0;
   }
   if ((!strncasecmp(pdevbuf, "TEMP", 4)) && (s = strchr(pdevbuf + 4, ':'))) {
      float temp = strtof(s + 1, NULL);
      if (temp > 0) {
         bitforce->temp = temp;
         if (temp > bitforce->cutofftemp) {
            applog(LOG_WARNING, "Hit thermal cutoff limit on %s %d, disabling!", bitforce->api->name, bitforce->device_id);
            bitforce->deven = DEV_RECOVER;

            bitforce->device_last_not_well = time(NULL);
            bitforce->device_not_well_reason = REASON_DEV_THERMAL_CUTOFF;
            bitforce->dev_thermal_cutoff_count++;
         }
      }
   }

   usleep(4500000);
   i = 4500;
   while (1) {
      BFwrite(fdDev, "ZFX", 3);
      BFgets(pdevbuf, sizeof(pdevbuf), fdDev);
      if (unlikely(!pdevbuf[0])) {
         applog(LOG_ERR, "Error reading from BitForce (ZFX)");
         return 0;
      }
      if (pdevbuf[0] != 'B')
          break;
      usleep(10000);
      i += 10;
   }
   applog(LOG_DEBUG, "BitForce waited %dms until %s\n", i, pdevbuf);
   work->blk.nonce = 0xffffffff;
   if (pdevbuf[2] == '-')
      return 0xffffffff;
   else if (strncasecmp(pdevbuf, "NONCE-FOUND", 11)) {
      applog(LOG_ERR, "BitForce result reports: %s", pdevbuf);
      return 0;
   }

   pnoncebuf = &pdevbuf[12];

   while (1) {
      hex2bin((void*)&nonce, pnoncebuf, 4);
#ifndef __BIG_ENDIAN__
      nonce = swab32(nonce);
#endif

      submit_nonce(thr, work, nonce);
      if (pnoncebuf[8] != ',')
         break;
      pnoncebuf += 9;
   }

   return 0xffffffff;
}

Depends on your revision. It would take a few day to have serious number for the price.
And they will not be manufactured before august.

As price negotiation seems a bit offtopic here i would like to ask you to pm me so we can dicuss this further.

I would do so but not before August (university  exams upcoming). The development was in cooperation with BFL i had the idea, did the design and produced the prototypes you see above.
And they wanted to sell them as a package to customers interested.
But due to the upcoming next gen with 1,4 gh/s the additional cooling became obsolete and we canceled the project.
Its intended for me to come back with the ASIC generation, as there overclocking by good temperatures becomes interesting again.

Maybe i also have to relativate the effect of the water cooling. On the upper board ( revision 01) i used just top cooling wich is just sufficient for keeping
the core at the temperatures it had with air cooling.
The lower one (revision 03) including two side cooling gave air cooling temps minus 8 °C and i have revised that design further to become better, but that is yet to be build( i have no additional bitforce singles )

So rev 01 and rev 03 are avaidable out of the box for now.

I did no pressure delta measurements as they did not seem nessesary yet.

I can also do other custom designs if somebody is interested.
Did so for the x6500 and wil for the lancelot.

Edit:
The rev 03 single will need to have the front fan connector desoldered or cut off !!