A bit off topic, but some experts here can answer me maybe, i m trying to optimize modification i made for a de0 nano, and i m trying to estimate the power used with the altera tool power play and dse explorer. How from the simulation can i extract the toggle rate ?
thx
Topic: Official Open Source FPGA Bitcoin Miner (Last Update: April 14th, 2013) - page 7. (Read 432965 times)
May 26, 2013, 11:30:18 AM
May 26, 2013, 06:41:40 AM
Can these be used on Litecoins yet?
May 26, 2013, 04:36:55 AM
Given that the Spartan 6 150's on other mining boards burn ~10W and only run at ~27C under a small (40mm squared) heat sink and moderate airflow, I would have thought that the Kintex is far more likely to be running at around 30C than 70C. If it is burning 10W then that heatsink and fan would have to have a thermal resistance of 5C/W to get the chip that hot - and that's pretty crappy for a heatsink with a fan...
May 25, 2013, 08:11:07 PM
Hi fpgaminer,
can I reply my question about the dps adder replacement by simple adders?
I won't do this job again if you are allready finished ;-)
If we can drop the used dsps below 50 % we can try to add a second ring.
Cheers...
can I reply my question about the dps adder replacement by simple adders?
I won't do this job again if you are allready finished ;-)
If we can drop the used dsps below 50 % we can try to add a second ring.
Cheers...
May 25, 2013, 07:29:39 PM
Quote
I have requested a pull for the open-source fpga project on github.
Hello goxed! I just checked your pull requests. There are no code changes in them. One just adds a file named "600MHz" with the text "600MHz" in it. The other is the same. There must have been a mistake somewhere.Quote
Does the KC705 have realtime PSU monitoring? If so, how many amps is it really using on the vcore 1v rail? I'd really like to know if Vivado's estimates are anywhere near close!
They shouldn't be hardly close at all. The toggle rate of a SHA-256 hasher is significantly higher than typical FPGA designs. Without a simulation to extract toggle rates from, Vivado's power estimator will do a very poor job.Quote
Hmm, I used exactly you vivado project to create an bitstream. But the temparature is near by 76-78 °C realted to my room temperature (24 °C at the moment):
2013-05-24 01:20:10.619202 [500] stdout: ('Temperature: ', 76.9086849212647)
Just a note, that temperature reading is coming from the die itself, so it should be fairly close to the "real" temperature of the fabric. The chips aren't designed to operate continuously above 85C (though I think they'll tolerate something like 100C without immediately failing). Personally, I'd throw an extra fan at my KC705 if the Kintex was running near 76C. 2013-05-24 01:20:10.619202 [500] stdout: ('Temperature: ', 76.9086849212647)
May 25, 2013, 04:45:30 AM
Is your fan rotating at full speed?
Depends on noise...yes. Is it readable? As I understood theres a pin on fpga whichpowers the fan. Possible the rotate count information from the fan could been
connected to the fpga for calculation by an counter. But I think that it is
Quote
Here is my temperature while mining at 600MHZ
2013-05-23 22:28:30.048826 [500] stdout: Temperature: 26.8926113129
Thats to less or you are living in Alaska and your miner is outside 2013-05-23 22:28:30.048826 [500] stdout: Temperature: 26.8926113129
Could you check the temp calculation? It's a good idea to modify the print line
given above with my extension to have an cross check.
Eighter the calculation in the python script is wrong or your kc705 reports really
to less temperature or mine reports to much.
In my opinion with this cooler and the amout of 12 W consumption the temperature
should been room temp + 40 °C estimated. By me it should 66° C but at the moment
I get 71°C. I've clocked now my fpga to 550 MHz and Vivado reports < 12 W.
My AVNet MMP reports 55 °C at <8W which confirms the values of KC705.
So lets precheck the calculation of:
2013-05-24 04:22:30.601187 [500] stdout: ('Temperature: ', '0xB20A', 77.34701766967777)
The formula on README of OSFPGA KC705_Experimental says:
Temp (C) = reading * 503.975 / 65536 - 273.15:
Code:
Python 3.2.4 (default, May 8 2013, 20:55:18)
[GCC 4.7.3] on linux2
Type "help", "copyright", "credits" or "license" for more information.
>>> 0xB20A
45578
>>> 0xB20A * 503.975 / 65536
350.49701766967775
>>> ( 0xB20A * 503.975 / 65536 ) - 273.15
77.34701766967777
>>> 0xB20A * 503.975 / 65536 - 273.15
77.34701766967777
I will edit the python code in a day or two. currently trying to improve the miner. But meanwhile here is temperature output from Chipscope while mining at 600MHz.
May 25, 2013, 12:36:45 AM
according to the kc705 datasheet pg 65, the PmBus has to be read using a PMBus pod from Texas Instruments to figure out current drawn from the voltage regulators.
Using chipscope one can monitor the voltage though.
Using chipscope one can monitor the voltage though.
May 24, 2013, 10:46:22 PM
Does the KC705 have realtime PSU monitoring? If so, how many amps is it really using on the vcore 1v rail? I'd really like to know if Vivado's estimates are anywhere near close!
Use the chipscope that comes with the software
May 24, 2013, 12:59:40 PM
Does the KC705 have realtime PSU monitoring? If so, how many amps is it really using on the vcore 1v rail? I'd really like to know if Vivado's estimates are anywhere near close!
May 24, 2013, 09:30:34 AM
Is your fan rotating at full speed?
Depends on noise...yes. Is it readable? As I understood theres a pin on fpga whichpowers the fan. Possible the rotate count information from the fan could been
connected to the fpga for calculation by an counter. But I think that it is
Quote
Here is my temperature while mining at 600MHZ
2013-05-23 22:28:30.048826 [500] stdout: Temperature: 26.8926113129
Thats to less or you are living in Alaska and your miner is outside 2013-05-23 22:28:30.048826 [500] stdout: Temperature: 26.8926113129
Could you check the temp calculation? It's a good idea to modify the print line
given above with my extension to have an cross check.
Eighter the calculation in the python script is wrong or your kc705 reports really
to less temperature or mine reports to much.
In my opinion with this cooler and the amout of 12 W consumption the temperature
should been room temp + 40 °C estimated. By me it should 66° C but at the moment
I get 71°C. I've clocked now my fpga to 550 MHz and Vivado reports < 12 W.
My AVNet MMP reports 55 °C at <8W which confirms the values of KC705.
So lets precheck the calculation of:
2013-05-24 04:22:30.601187 [500] stdout: ('Temperature: ', '0xB20A', 77.34701766967777)
The formula on README of OSFPGA KC705_Experimental says:
Temp (C) = reading * 503.975 / 65536 - 273.15:
Code:
Python 3.2.4 (default, May 8 2013, 20:55:18)
[GCC 4.7.3] on linux2
Type "help", "copyright", "credits" or "license" for more information.
>>> 0xB20A
45578
>>> 0xB20A * 503.975 / 65536
350.49701766967775
>>> ( 0xB20A * 503.975 / 65536 ) - 273.15
77.34701766967777
>>> 0xB20A * 503.975 / 65536 - 273.15
77.34701766967777
May 23, 2013, 10:29:43 PM
Is your fan rotating at full speed?
Here is my temperature while mining at 600MHZ
2013-05-23 22:28:30.048826 [500] stdout: Temperature: 26.8926113129
2013-05-23 22:28:30.298841 [350] Untitled KC705UART worker: Found share: XXXXXXX
:000000021910f9e1ac919036f4c838972845e8bff5a5676eaa8294fc0000008500000000495a089
9298a623a17a125e003af676ad660389dfc2e3ab7269cafdc95f292f3519ede561a017fe9:b54360
0a
2013-05-23 22:28:30.339843 [250] Untitled KC705UART worker: Eclipse accepted sha
re b543600a (difficulty 1.39333)
Here is my temperature while mining at 600MHZ
2013-05-23 22:28:30.048826 [500] stdout: Temperature: 26.8926113129
2013-05-23 22:28:30.298841 [350] Untitled KC705UART worker: Found share: XXXXXXX
:000000021910f9e1ac919036f4c838972845e8bff5a5676eaa8294fc0000008500000000495a089
9298a623a17a125e003af676ad660389dfc2e3ab7269cafdc95f292f3519ede561a017fe9:b54360
0a
2013-05-23 22:28:30.339843 [250] Untitled KC705UART worker: Eclipse accepted sha
re b543600a (difficulty 1.39333)
May 23, 2013, 09:28:15 PM
I would love to know what differences you made in implementation to get down to 45C for 600mhz. That seems like a really drastic improvement.
I'm unsure that he mades so much improvement. As I understood vivado reports on his design >12W which must be dissipationed against 400 MHz github design which reports <9 W and gives temps near by 60 °C.
But there chip to cooler heat conduction is possible better.
May 23, 2013, 09:22:33 PM
Hmm this is interesting. My room temp is 26C, and the FPGA never reported more than 45C on the 600MHz bitstream.
Are you sure the values are calculated correctly? Whats the temperature without calculating hashes? It should been round about 30-35 °C.Which temp values do you get from serial port with minicom if no mining is working?
I've modified a little bit the kc705uartworker.py for checking:
Code:
print("Temperature: ", "0x" + response, temperature)
Here the results from the console at the beginning of mining. Be aware, the lower values comes from the AVNet MMP
Code:
2013-05-24 04:12:54.601721 [500] stdout: ('Temperature: ', '0xA116', 43.97220840454105)
2013-05-24 04:12:55.744079 [500] stdout: ('Temperature: ', '0x9E8C', 38.973677062988315)
2013-05-24 04:12:59.743875 [500] stdout: ('Temperature: ', '0x9FDF', 41.58060340881349)
2013-05-24 04:13:02.601813 [500] stdout: ('Temperature: ', '0xA119', 43.99527854919438)
2013-05-24 04:13:03.744184 [500] stdout: ('Temperature: ', '0xA055', 42.488029098510765)
2013-05-24 04:13:06.601711 [500] stdout: ('Temperature: ', '0xA00A', 41.91127548217776)
2013-05-24 04:13:07.744082 [500] stdout: ('Temperature: ', '0x9F0F', 39.98107337951666)
2013-05-24 04:13:10.601820 [500] stdout: ('Temperature: ', '0x9F85', 40.88849906921388)
2013-05-24 04:13:11.744180 [500] stdout: ('Temperature: ', '0x9E44', 38.41999359130864)
...
2013-05-24 04:22:23.744699 [500] stdout: ('Temperature: ', '0xA77F', 56.59157752990728)
2013-05-24 04:22:27.744679 [500] stdout: ('Temperature: ', '0xA772', 56.49160690307622)
2013-05-24 04:22:30.601187 [500] stdout: ('Temperature: ', '0xB20A', 77.34701766967777)
2013-05-24 04:22:31.744582 [500] stdout: ('Temperature: ', '0xA777', 56.530057144165085)
2013-05-24 04:22:34.601285 [500] stdout: ('Temperature: ', '0xB1F6', 77.1932167053223)
2013-05-24 04:22:35.744667 [500] stdout: ('Temperature: ', '0xA78D', 56.69923820495609)
...
May 23, 2013, 08:58:27 PM
I would love to know what differences you made in implementation to get down to 45C for 600mhz. That seems like a really drastic improvement.
May 23, 2013, 08:09:18 PM
70C. The chip is rated to 85C, what temperature were you at at 600mhz
implemented various implementation strategies to cherry pick get a good bitstream running stable at 550MHz+.
The temperature is between 30 to 45 C depending on the time of day. My KC705 came with a heatsink + fan though.
2013-05-24 01:20:10.619202 [500] stdout: ('Temperature: ', 76.9086849212647)
I'm still on 600 MHz at the moment because it looks like stable.
In my opinion we should switch the clock frequency dynamicable to an less value if the temp will increase over an limit, e.g. 80 °C. What do you think? It should not be so hard to do that.
My heatsink + fan looks like the same as on your pictures.
Hmm this is interesting. My room temp is 26C, and the FPGA never reported more than 45C on the 600MHz bitstream.
May 23, 2013, 06:21:51 PM
70C. The chip is rated to 85C, what temperature were you at at 600mhz
implemented various implementation strategies to cherry pick get a good bitstream running stable at 550MHz+.
The temperature is between 30 to 45 C depending on the time of day. My KC705 came with a heatsink + fan though.
2013-05-24 01:20:10.619202 [500] stdout: ('Temperature: ', 76.9086849212647)
I'm still on 600 MHz at the moment because it looks like stable.
In my opinion we should switch the clock frequency dynamicable to an less value if the temp will increase over an limit, e.g. 80 °C. What do you think? It should not be so hard to do that.
My heatsink + fan looks like the same as on your pictures.
May 23, 2013, 03:31:15 PM
Quote
But my FPGA still runs fine at 600MHz.
I guess it's stretching the limits. Also it could vary chip to chip, since -3 speed grade has a Fmax of 601.32MHz
I guess it's stretching the limits. Also it could vary chip to chip, since -3 speed grade has a Fmax of 601.32MHz
Did you just modify the clock on fpgaminers code? I upped the clock to 450mhz and it was running stable at 70C. The chip is rated to 85C, what temperature were you at at 600mhz
Very minor mods.
I modified settings of the FIFO, and the Clock multiplier. I can PM you my vivado project. Moreover I implemented various implementation strategies to cherry pick get a good bitstream running stable at 550MHz+.
The temperature is between 30 to 45 C depending on the time of day. My KC705 came with a heatsink + fan though.
May 23, 2013, 03:28:52 PM
Nope the FIFO / BRAM doesn't meet timing specs. The Fmax for K7 speed grade -2 FIFO is 543.77MHz. But my FPGA still runs fine at 600MHz.
Whats your target temperature ? I've load now the bitstream from your project and the temp is grown to >76 °C which is to near to 80° C(?) limit of the commercial chips which are used I mean on KC705.I've put an old cpu 8cm fan so little air flow is from the pdc side to the kintex.
Better I will clock to 550 MHz so temp of pdcs and kintex will not override.
Cheers...
Does your k7 have a heatsink + fan? Something like this. http://sls.smugmug.com/Professional/Platform-Blue/5440422_d6JQGF/1530805068_bv3hrdM#!i=1530805068&k=bv3hrdM
May 23, 2013, 09:37:57 AM
Quote
But my FPGA still runs fine at 600MHz.
I guess it's stretching the limits. Also it could vary chip to chip, since -3 speed grade has a Fmax of 601.32MHz
I guess it's stretching the limits. Also it could vary chip to chip, since -3 speed grade has a Fmax of 601.32MHz
Did you just modify the clock on fpgaminers code? I upped the clock to 450mhz and it was running stable at 70C. The chip is rated to 85C, what temperature were you at at 600mhz
May 23, 2013, 09:24:10 AM
Nope the FIFO / BRAM doesn't meet timing specs. The Fmax for K7 speed grade -2 FIFO is 543.77MHz. But my FPGA still runs fine at 600MHz.
Whats your target temperature ? I've load now the bitstream from your project and the temp is grown to >76 °C which is to near to 80° C(?) limit of the commercial chips which are used I mean on KC705.I've put an old cpu 8cm fan so little air flow is from the pdc side to the kintex.
Better I will clock to 550 MHz so temp of pdcs and kintex will not override.
Cheers...
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