You have missed my point. Somebody mentioned that KnC had no intentions on running test vectors on the chip tester. The hasher its great for generating coverage. That's what I meant by "free BIST" and signature analysis earlier. I've done similar things in the past, not with SHA's, but with CRC's. When you have this infrastructure on your device you should utilize it on the chip tester and detect the defects early and not after you have mounted the chips. And while you're at it do scan insertion and ATPG to increase you coverage further since catching errors and faults early is a lot cheaper than later in the product cycle.
I don't really see the point of testing without the PCB, since the PCB is only going to have one chip. It's not like a motherboard where you have lots of expensive chips, or an Avalon module where you have lots of chips in parallel - you can think of the PCB as simply being a larger package for the chip.
And, it would be much simpler to test the PCB then to test the chip. The chip itself has a 1mm ball pitch and thousands of balls. Aligning it might take time, and it will generate a lot of heat in the tester (I guess you could test one engine at a time, though)
On the other hand the PCB has an edge connector (at least the demo ones they showed in the video) All you'd need to do is plug it into a slot to test. Much easier and quicker.
So on the one had it might be slightly more expensive as you'd lose a PCB, but on the other hand you'd save time by not passing each chip through a second stage.
If their confident their yeilds will be high, they've got nothing to worry about. ORSoC has probably fab'd chips at this resolution before and knows what to expect. If their yeilds are high enough they can actually just assemble the units, then test them, and only replace PCBs that have a fault.
Remember they are selling these chips for about $1750 a pop, and delivery speed is the most critical thing for the customer. How much could the PCB ex-chip cost? $20? Even if they threw out 2 PCBs for every shipped module it would barely eat into their margins (although I'm sure the low chip yeild would suck)
