It's not common to skip this chip level test (like it's claimed that KnC does) and let the customer or some 3rd party test the chip using some expensive fixture or run tests on actual PCB for the purpose of testing the chip (of course you run a lot of test on the PCB to detect bad solder joints and other assembly problems).
Give it a rest. You're blowing this up completely out of proportion from a throwaway remark made at an open day months ago. As I said earlier, testing is what the semiconductor industry does. Yes, this can be skipped for the very first samples off the production line, but its not the norm for production parts and won't be the norm with KNC either. Not sure what your point about customer or 3rd party testing is about ... chip packaging and final test is subcontracted, the test equipment is already there. You
may need a custom socket/interface card built, but there are also standard fixtures for all the common packages, which will be perfectly adequate for the majority of devices.
That's what I've been saying the whole time. Chips are tested in the fab during production using supplied test vectors. I've described the procedure above. The standard procedure is also to include scan insertion and generate test vectors for the tester.
But now you are providing some new information: That KnC will do testing when they scale up the production? This contradict with information given earlier.
But I don't understand why they would want to skip testing on this in the first batch? (unless they just want devices for a photograph)
When they assemble their first set of miners and it does not work they will not know if it's a problem with the fabrication of the particular chip and will have to spend more time debugging trying to figure out where the problem is (device production, functional errors, software problems, power issues, FPGA logic, etc). If the device passed the chip level test you have one less unknown factor.