Yes, hynix mjr didn't like TFAW/TFAW32=0 so as TRRD=5.
Thanks for help.
Another one question: (1) does changing some parameters needs to change others? (2) Is any parameters depends from other? (3) What parameters are linked between each other?
(1) Based on what so far is known about the Polaris mctrl: In some cases: Yes
(2) There are for sure relations "inside" the strap and also with Timings that are not in the strap (as the strap does not contain all timings). A Datasheet from an AMD DEV would be more than handy
(3) trfc/trc and so on .. there are a few, but it`s also to see in combination with the diff, vendors of the gddr rams. As there are (again) slight differences. A value that works on samsung, does not on hynix and maybe helps a bit on Elpida and so on ....
Basically it`s the same as on the DDR Rams, just abit more complicated - as the memcontrollers evolved a lot ... much tweaking is without the datasheets just trial and error.
How trfc and trc linked between each other? I didn't find any dependens with them... trfc usually is 186,192,206,219. trc is 65,70,73,75.
Basically: (got a bit rosty on these
)
tRFC is the time allowed to refresh a whole memory bank (Time between a ref and the next act command)
tRC is the time allowed for a complete cycle (act, pre etc)
tFAW should be the window for 4 act, 32 etc ....
Reading some JEDEC docs sheds some light on these
I'm no so strong in english, therefore reading these docs gives me not so much... Automatic translators such specific docs translate very ugly, you know...
Can you give an example on some strap? I would be very greatful!
There is no way around reading specs if you really want to understand how these timings work.
If you just want a good strap, you can try one of these:
https://github.com/jaschaknack/PolarisBiosEditor/blob/b0bf3c7a80f4e9b35cac244d86e2e66d8e06a137/PolarisBiosEditor.csI used this straps allready. For hynix mjr they are not good enough, especially for cryptonight. They are good for ethereum.
I find and edit strap by myself and can reach 1k h/s in cryptonight with hynix 8Gb mjr memory on Nitro+, but it not stable enough... There is no memory errors, but give rejected shares about 3-5% from speed.
Most improtant strap parametr for cryptonight is TRRD. With TRRD=5 and 2000MHz it's easy to have 1k h/s in cryptonight. I think it's not only for hynix mjr.
But hynix mjr became not stable with TRRD=5.
I tried TRFC 198, 206, 219. TRC up to 73. FAW/TFAW32 set to not 0. But it's not helps. GPU continue to give rejects sometime...
Any other suggestions?
And please give me link to JEDEC docs about GDDR5 memory. I'll try to understand how that memory works...
