Modular FPGA Miner Hardware Design Development - page 17.

li_gangyi

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Quote

Actually, could you not share those? The VCCaux supply powers the frequency synthesizers in the FPGA and needs to be filtered to a better degree than VCC_O. This is apparently normally done by taking a supply to generate VCC_O and then adding an LC-filter to get VCCaux.

I've looked at the spec sheet for Vccaux specifications, only real limitation is I do not allow more then 5% ripple to be exceeded on the design. At the current number of IOs that we need (non of our IOs need to be driven very hard, or very fast), that's not going to be a problem. As long as we include the suggested number and layout for decoupling caps it's going to be sufficient.

I've looked at the Xilinx forums regarding this matter, and nothing seems to suggest otherwise.

http://forums.xilinx.com/t5/Spartan-Family-FPGAs/Doubt-regarding-VCCAUX-voltage-level-and-its-separate-power/td-p/162346

Olaf.Mandel

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Quote from: li_gangyi on July 18, 2011, 12:03:31 PM

[...]
I'm also doubting that this board will be useful as an experimental platform, alot of the GTP is not present, there's no memory at this point in time, even the PSU for Vccio is shared with Vccaux, which is non optimal if there's alot of IO activity.[...]

Actually, could you not share those? The VCCaux supply powers the frequency synthesizers in the FPGA and needs to be filtered to a better degree than VCC_O. This is apparently normally done by taking a supply to generate VCC_O and then adding an LC-filter to get VCCaux.

fizzisist

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I created a first try at a very high level block diagram. Mainly, my idea was to have a "straw man" that we can all have in mind when we discuss. Hopefully, it will get better as the ideas get more refined.

This is uploaded to the dropbox at Documentation/Block_Diagram, in PPT format. Here's a link to a PNG of the diagram, so that those without access can see it, too:

http://dl.dropbox.com/u/13472215/block_diagram_daughter.png

Please point out any mistakes I made or edit the file yourself.

O_Shovah

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Watercooling the world of mining

Quote from: sirky on July 18, 2011, 12:53:00 PM

I have no technical expertise, so I cannot really comment on the discussion, but I just want to let you guys know that I think this project is really cool. I would probably be willing to buy one just to play around with it as long as the total cost to get everything up and running is <= a grand!

Allways feels good to read such comments.Thanks
Any precise price estimations would be fortune telling right now but i asume you will get more than one board of you 1000$.

Quote from: fizzisist on July 18, 2011, 01:02:12 PM

Yes, the MSP430 will use the 2.5V rail. It should put an insignificant load on that line, on the order of 5 mA. I agree that a block diagram is in order. I think we also could use a document describing what kind of functions the MCU will be responsible for. Both of these could be placed in the Dropbox. I'll try to work on the block diagram if I have time today.

That would be great.
I am certainly becoming more moderator than constructor, as we are moving further into detail.So i will mostly do the organisation.
I just can't keep my learning at the speed we are advancing, so i hope you bear with me even if i don't understand all technical details.(But as a student i'm allways happy to learn

)

fizzisist

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Quote from: li_gangyi on July 18, 2011, 12:33:30 PM

How are we planning to power the MSP430? 2.5v? And does bitcoin mining require any sort of external memory buffer? I'm not familiar with FPGAs enough. We also need to think about the clock source.

Maybe some1 can draw up a block diagram of what the final result will look like and then we can solve each one step by step.

Yes, the MSP430 will use the 2.5V rail. It should put an insignificant load on that line, on the order of 5 mA. I agree that a block diagram is in order. I think we also could use a document describing what kind of functions the MCU will be responsible for. Both of these could be placed in the Dropbox. I'll try to work on the block diagram if I have time today.

Quote from: sirky on July 18, 2011, 12:53:00 PM

I have no technical expertise, so I cannot really comment on the discussion, but I just want to let you guys know that I think this project is really cool. I would probably be willing to buy one just to play around with it as long as the total cost to get everything up and running is <= a grand!

Good to know that there is more interest! If we can pool our money together for the first production run, we can order more boards, and therefore lower the price per board significantly. This is something we will need to start discussing after the first prototypes are finished.

sirky

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I have no technical expertise, so I cannot really comment on the discussion, but I just want to let you guys know that I think this project is really cool. I would probably be willing to buy one just to play around with it as long as the total cost to get everything up and running is <= a grand!

li_gangyi

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We can always minimise risks, populate the PSU first before the FPGA, populate only 1 FPGA at the start, and if all else fails, remove and reball the FPGAs and list em on ebay I guess...

How are we planning to power the MSP430? 2.5v? And does bitcoin mining require any sort of external memory buffer? I'm not familiar with FPGAs enough. We also need to think about the clock source.

Maybe some1 can draw up a block diagram of what the final result will look like and then we can solve each one step by step.

O_Shovah

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Watercooling the world of mining

K so we will have a pure miner in the first run. No risk no fun Wink

li_gangyi

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Quote from: fizzisist on July 18, 2011, 10:50:41 AM

li_gangyi, I looked at your PSU schematic in the Dropbox folder. I hope you don't mind, but I made some changes, mostly cosmetic. I think what you have looks good. Some details on the component packages and values can be discussed later (usually depends mostly on availability and price).

Quote from: O_Shovah on July 18, 2011, 03:59:23 AM

In addition we should further investigate on the matter wich changes to our currently desired setup are nessesary to allow the use of different programms than for bitcoin.

I think this is going to be a difficult requirement to achieve. If we can think of some minor changes that make the design more flexible, great, but I have my doubts. Remember, we are building this because the generic and flexible evaluation boards out there are too expensive. The point was to take out all the other stuff and build a board with none of the unnecessary features that those other boards have, and therefore reduce the price.

Please don't let my doubts completely dissuade you from trying, though.

I've looked at component availability, digikey should have all the parts I've put down, capacitor ESRs are pretty critical.

I'm also doubting that this board will be useful as an experimental platform, alot of the GTP is not present, there's no memory at this point in time, even the PSU for Vccio is shared with Vccaux, which is non optimal if there's alot of IO activity. We're gonna also have to add some connectors for the IOs (more routing, layers probably)

We could work out all of these limitations, but in the end I think our board will just end up being more expensive. I wouldn't go for it.

fizzisist

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li_gangyi, I looked at your PSU schematic in the Dropbox folder. I hope you don't mind, but I made some changes, mostly cosmetic. I think what you have looks good. Some details on the component packages and values can be discussed later (usually depends mostly on availability and price).

Quote from: O_Shovah on July 18, 2011, 03:59:23 AM

In addition we should further investigate on the matter wich changes to our currently desired setup are nessesary to allow the use of different programms than for bitcoin.

I think this is going to be a difficult requirement to achieve. If we can think of some minor changes that make the design more flexible, great, but I have my doubts. Remember, we are building this because the generic and flexible evaluation boards out there are too expensive. The point was to take out all the other stuff and build a board with none of the unnecessary features that those other boards have, and therefore reduce the price.

Please don't let my doubts completely dissuade you from trying, though.

li_gangyi

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Added updated layout + schematic files for the PSU and BOM to the dropbox, I think that is alot easier to use then Github for this.

grid

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Quote from: senseless on July 18, 2011, 05:03:54 AM

Apologies, had no idea that the chip was not yet on the market. I guess the spartan 6 is as good as it gets for the time being.

It took 2 years for the Spartan-6 to become widely available in numbers since announcement, so the Artix-7 is somewhere on the horizon. Interesting to look at, but will be out of reach probably until 2013.

senseless

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Quote from: makomk on July 18, 2011, 04:29:07 AM

This is also wildly off-topic though, given that this thread's about building boards with actual FPGAs that are available now.

Apologies, had no idea that the chip was not yet on the market. I guess the spartan 6 is as good as it gets for the time being.

makomk

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Quote from: senseless on July 18, 2011, 01:48:24 AM

Does anyone know what the cost of these 28nm Artix 7 chips are? I've been looking through and the XC7A350T looks promising with 350k LUs. From the text on the site it looks like they're using this chip to replace the Spartan 6's.

Right now they're not available at any price as far as I can tell; initial samples are meant to be shipping in the first quarter of 2012, with production quantities available who-know-how-long later. This is also wildly off-topic though, given that this thread's about building boards with actual FPGAs that are available now.

Expect to fit at least 4 hashers in the XC7A350T unless Xilinx have done something daft in the design again like they did with Spartan-6, which is entirely possible. I have no idea about clock speeds; estimating that would require a full ISE license.

O_Shovah

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Watercooling the world of mining

I see the drawing looks good so far.

But the eagle .sch file seems to be corrupted at least my eagle says so.
Maybe you check this please.

Again i would like to advertise the use of my dropbox folder ( or someones else but only one ) just need to have your email.

In addition we should further investigate on the matter wich changes to our currently desired setup are nessesary to allow the use of different programms than for bitcoin.

li_gangyi

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Here's the PSU I've layed out.

http://www.dropbox.com/gallery/19035447/1/FPGA?h=b7ac9a

http://dl.dropbox.com/u/19035447/FPGA%20PSU.sch

I've split up the Vccint reg for easier layout, thermal management and headroom.
Vccaux and Vccio are both tied together and set at 2.5v, I think if we want to use the board not just for Bitcoin mining, we might have to split the supplies, or at least filter the Vccaux with ferrite beads.

I've left alot of headroom for this design, the modules are also easy to use, very few external parts, and are hand solderable if we decide to prototype or change anything.

O_Shovah

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Watercooling the world of mining

Quote from: senseless on July 18, 2011, 01:48:24 AM

Does anyone know what the cost of these 28nm Artix 7 chips are? I've been looking through and the XC7A350T looks promising with 350k LUs. From the text on the site it looks like they're using this chip to replace the Spartan 6's.

I asume their cost ~~to be prohibitive~~(remember we want to create a system with low entry investions) but the most resticting feature is their avaidability wich is said to be even worse.I addtition we would need a full commercial license for ISE, so lets please stick with the FPGA we have voted on unless you get a highly competetive price quote.
Just for comparison a similar board you quoted exists already and is ~8500 Euro each.
Edit:I see they tell the price to be "at lower price points than Spartan®-6 FPGAs" but still we may use them on a sucessor to this project not now.

Quote from: bahnfire on July 17, 2011, 09:52:10 PM

That deadline is reasonable for a prototype unit that is in the middle of testing and firmware bringup. I do not anticipate many issues with this type of design as it is a straight FGPA with ucontroller. Were any of the individual functions tested separately at least (power bus, etc) with proper loading? If not, we should do this as re-spinning the PCB would not be cost effective if there is a major issue on those smaller functions. I have a DC load tester (constant voltage or current) here as well as a decent scope that we can use.

No there hasn't been any testing of any real components so far.
I agreed we should individually test segments of our setup.Power supply should be easiest to do.
Maybe Li_gangyi could post his desired setup so you may have a look on it.

Further the BUS system needs individual testing.

senseless

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Does anyone know what the cost of these 28nm Artix 7 chips are? I've been looking through and the XC7A350T looks promising with 350k LUs. From the text on the site it looks like they're using this chip to replace the Spartan 6's.

The idea of being able to slap 8+ of those chips on a 1x PCI-E board appeals to me. From my figures the code should be able to be unrolled 3-4 times per chip giving a theoretical processing power of 1ghash/s per chip. Since the spartan 6 is running at about 66% efficiency compared to it's theoretical values. I figure the XC7A350T current real world values would be around 600mhash/s per chip.

I sent an email query off asking for pricing information but have not heard back yet.

bahnfire

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The World’s First Blockchain Core

That deadline is reasonable for a prototype unit that is in the middle of testing and firmware bringup. I do not anticipate many issues with this type of design as it is a straight FGPA with ucontroller. Were any of the individual functions tested separately at least (power bus, etc) with proper loading? If not, we should do this as re-spinning the PCB would not be cost effective if there is a major issue on those smaller functions. I have a DC load tester (constant voltage or current) here as well as a decent scope that we can use.

O_Shovah

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Watercooling the world of mining

Quote from: bahnfire on July 17, 2011, 06:14:52 PM

Sounds good. I will review thread history tonight to see what has been done (decisions, links, etc). I do agree that adding in support for future expansion would be nice, since this could be a nice training/development platform as well as for the BTC market. I will post any recommendations on this thread. What is the time line - when are you expecting to hit the PCB house for the first run?

Currently there is no specified deadline.I just keep pushing everybody forward as i can Wink

. I would appreciate it if we could a least get to a prototype stage minimum end of this summer, or do you consider this difficult?

In the end, the deadline is set by the arrival of any other, both cost per Mhash and Mhash per watt, effective solution. So generaly speaking any ASIC chips being released in huge numbers.(Altough i would finish this project anyway as this is "our own" solution)

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